Semiconductor Wet Etching Sequence for Selective Gate Stack Removal
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling down IC production, particularly in maintaining the integrity and efficiency of gate stacks and semiconductor devices as geometry sizes decrease, leading to issues with metal layer and silicon-containing pattern removal during the fabrication process.
Innovation Solution
A method involving a series of wet etching processes using alkaline and acidic solutions, accompanied by cleaning processes, to selectively remove metal layers and silicon-containing patterns without damaging surrounding dielectric layers or semiconductor nanosheets, ensuring precise control and high selectivity to maintain device integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to remove metal and silicon-containing layers, then material removal is achieved, but adjacent structures such as dielectric layers and semiconductor nanosheets are damaged
Solution Approach 1:
The etching process is divided into multiple sequential steps with different etchants: first an alkaline solution removes metal layers, then an acidic solution removes silicon-containing layers. Each step is optimized to selectively target specific materials while preserving others, achieving high selectivity without damaging adjacent structures.
Solution Approach 2:
The patent employs different chemical parameters (pH, composition, temperature) for different etching steps. The alkaline etching solution is optimized for metal removal, while the acidic solution is optimized for silicon removal. By changing chemical parameters between steps, the process achieves selective material removal with minimal damage to surrounding structures.
2Manufacturing precision
If aggressive etching is used to ensure complete material removal, then removal completeness is improved, but structural integrity of semiconductor nanosheets deteriorates
Solution Approach 1:
The removal process is segmented into separate alkaline and acidic etching steps, each optimized for specific materials. This prevents the need for aggressive single-step etching that would compromise nanosheet integrity, while still achieving complete removal of target layers through cumulative action of multiple gentler steps.
Solution Approach 2:
The patent uses intermediary cleaning processes between etching steps to remove residues without requiring overly aggressive etching. The cleaning steps act as intermediaries that maintain completeness of material removal while protecting nanosheet structure from damage.
3Device complexity
If single-step etching is used for simplicity, then process complexity is reduced, but manufacturing precision of selective material removal deteriorates
Solution Approach 1:
The etching process is deliberately segmented into multiple steps with different chemistries (alkaline then acidic) to achieve high selectivity. Each step targets specific materials, allowing precise control over which layers are removed. The increased process complexity directly enables the improved manufacturing precision and selective material removal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the complete removal of metal layers and silicon-containing patterns while preserving the integrity of semiconductor devices, preventing corrosion and bending, and enhancing the robustness and efficiency of the resulting semiconductor structure.
Implementation Method 1
A first wet etching process is performed by using a first etching solution, to clean a surface of the metal layer
Implementation Method 2
A second wet etching process is performed by using a second etching solution, to remove the metal layer
Implementation Method 3
The cleaning process is performed
Data Source
AI summary
A method of forming a semiconductor device includes the following steps. A metal layer with at least one silicon-containing pattern therein is provided. A first wet etching process is performed by using a first etching solution, to clean a surface of the metal layer, wherein the first etching solution contains a base and a first oxidant. At least one cycle is performed. Each cycle includes a second wet etching process and a cleaning process. The second wet etching process is performed by using a second etching solution, to remove the metal layer, wherein the second etching solution contains an acid and a second oxidant. A cleaning process is performed.