Semiconductor Package Wire Bonding Fan-Out Structure
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Solution Overview
Problem
The manufacturing processes for semiconductor package devices using the flip-chip technique are complex and expensive, particularly due to the cost and complexity associated with fine-pitch interposer or copper pillar structures.
Innovation Solution
A semiconductor package device design that employs conductive wires electrically connected to an electronic component, with an insulation layer devoid of fillers surrounding the wires, providing a fan-out structure that reduces manufacturing costs and time by avoiding the need for expensive interposers or copper pillars.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If flip-chip technique with interposer or copper pillar structures is used, then fine-pitch electrical connectivity is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent replaces expensive, complex interposer or copper pillar structures with simple, inexpensive bonding wires that achieve the same electrical connectivity function. The bonding wires are temporary-looking simple structures that effectively provide fine-pitch connections without the manufacturing complexity of interposers or copper pillars.
Solution Approach 2:
The patent changes the physical form and material parameters of the interconnection structure from rigid interposer/copper pillar architectures to flexible bonding wire architectures. This parameter change enables fine-pitch connectivity through wire bonding technology with different geometric and material characteristics.
2Strength
If filler-containing insulation layer is used, then structural support is provided, but manufacturing complexity increases
Solution Approach 1:
The patent extracts the filler materials from the insulation layer, using a pure resin composition without particulate fillers. This extraction simplifies the insulation layer formulation and manufacturing process while maintaining adequate structural support through the resin matrix alone.
Solution Approach 2:
The patent uses a homogeneous resin-based insulation layer without heterogeneous filler particles. This homogeneous composition simplifies the material formulation, reduces manufacturing complexity, and eliminates issues related to filler distribution and processing while providing sufficient mechanical support.
3Manufacturing precision
If interposer or copper pillar structures are used, then fine-line redistribution is achieved, but manufacturing cost increases
Solution Approach 1:
The patent replaces costly interposer or copper pillar structures with inexpensive bonding wires for achieving fine-line redistribution. The bonding wires provide the necessary electrical interconnection at a fraction of the cost of interposer or copper pillar implementations.
Solution Approach 2:
The patent substitutes the mechanical interposer or copper pillar system with a wire bonding system. This substitution replaces complex mechanical structures with a simpler wire-based electrical connection system that achieves the same redistribution function at lower cost.
4Reliability
If complex manufacturing processes are used, then high-quality electrical connections are achieved, but production time increases
Solution Approach 1:
The patent uses simple bonding wires instead of complex interposer or copper pillar structures, which significantly reduces manufacturing steps and production time while maintaining reliable electrical connections. The wire bonding process is well-established and faster than interposer fabrication and assembly.
Data Source
AI summary
A semiconductor device package includes an electronic component, a first set of conductive wires electrically connected to the electronic component, and an insulation layer surrounding the first set of conductive wires. The insulation layer exposes a portion of the first set of the conductive wires. The insulation layer is devoid of a filler.