Semiconductor Package Wire Diameter Variation
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Solution Overview
Problem
Conventional semiconductor packages waste material due to uniform wire diameters, leading to increased manufacturing costs and limited flexibility in device layout due to identical pad sizes.
Innovation Solution
A semiconductor package design featuring first and second wires with different diameters and lengths, where the second wire has a larger diameter and length than the first wire, and pads of varying sizes to reduce material usage and enhance layout flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of substance
If uniform wire diameters are used in conventional semiconductor packages, then manufacturing simplicity is maintained, but material waste increases and manufacturing cost increases
Solution Approach 1:
The patent applies local quality by varying wire diameters based on specific connection requirements. Different wires have different diameters optimized for their respective functions and lengths, rather than using a uniform diameter for all wires. This reduces material waste while maintaining manufacturability through selective differentiation.
Solution Approach 2:
The patent changes the parameter of wire diameter from a constant value to a variable value based on connection needs. By adjusting wire diameter as a variable parameter, the design optimizes material usage for each specific wire while keeping the manufacturing process feasible.
2Adaptability or versatility
If identical pad sizes are used in conventional semiconductor packages, then manufacturing simplicity is maintained, but layout flexibility is reduced
Solution Approach 1:
The patent applies local quality by assigning different pad sizes to different locations based on their specific functional requirements. This allows the layout to be optimized for each connection while maintaining manufacturing feasibility through standardized fabrication processes.
Solution Approach 2:
The patent changes the parameter of pad size from a constant value to a variable value based on layout requirements. By making pad size a variable parameter, the design achieves greater layout flexibility while keeping the manufacturing process manageable.
3Reliability
If gold material is used for all wires in conventional semiconductor packages, then electrical conductivity is ensured, but manufacturing cost increases
Solution Approach 1:
The patent applies local quality by using different materials or material compositions for different wires based on their specific electrical and mechanical requirements. This allows cost optimization by using expensive gold material only where necessary while using cheaper alternatives where sufficient.
Solution Approach 2:
The patent employs composite materials by combining different wire materials with different properties in the same semiconductor package. This allows optimization of both cost and performance by selecting appropriate materials for each specific application within the package.
Data Source
AI summary
The present invention relates to a semiconductor package, comprising a carrier, a semiconductor device, a first wire and a second wire. The carrier has a first electrically connecting portion and a second electrically connecting portion. The semiconductor device has a plurality of pads. The first wire electrically connects one of the pads of the semiconductor device and the first electrically connecting portion of the carrier, and the first wire has a first length. The second wire electrically connects one of the pads of the semiconductor device and the second electrically connecting portion of the carrier, and the second wire has a second length. The second length is larger than the first length, and the diameter of the second wire is larger than that of the first wire. Thus, the material usage for the wire is reduced, and the manufacturing cost is reduced.