Semiconductor Wire Gold Plating Without Nickel Over-Etching

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Solution Overview

Problem

Existing methods for manufacturing semiconductor devices, such as ENIG and ENEPIG processes, face challenges with air pore generation and over-etching of the nickel layer, which affect solder joint reliability.

Innovation Solution

A method involving the deposition of a gold layer on wires by immersion gold plating, after removing the seed layer and exposing the wires, to enhance solder joint reliability and prevent oxidation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electroless nickel immersion gold (ENIG) process is used to deposit nickel and gold layers, then the wires are protected from oxidation, but hydrogen bubbles generated during nickel deposition cause air pores that reduce solder joint reliability

Engineering Contradiction:
Improvesolder joint reliabilityVSAvoidair pore
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes the nickel layer entirely from the wire structure, extracting the source of hydrogen bubble generation and air pore formation. The wire consists only of copper core and gold layer, eliminating the problematic intermediate nickel deposition step while maintaining oxidation protection through the gold layer.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the multi-layer nickel-gold structure with a simpler copper-gold structure. The gold layer serves both as oxidation protection and as the final solderable surface, eliminating the need for nickel as an intermediate layer and reducing overall material complexity.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If electroless nickel electroless palladium immersion gold (ENEPIG) process is used to form nickel-phosphorus alloy layer, then the wires are protected from oxidation, but the nickel-phosphorus alloy layer is over-etched during immersion gold plating which lowers solder joint reliability

Engineering Contradiction:
Improvesolder joint reliabilityVSAvoidnickel layer etching control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent extracts the nickel-phosphorus alloy layer from the wire structure, eliminating the over-etching problem during immersion gold plating. The wire consists only of copper core and gold layer, removing the intermediate layer that causes manufacturing precision issues.

Inventive Principle:
Principle #2Taking out (Extraction)

3Object-affected harmful factors

If conventional surface treatment processes are used to protect wires from oxidation, then the wires are isolated from air, but the complex multi-layer structures increase manufacturing complexity and risk of defects

Engineering Contradiction:
Improveoxidation protectionVSAvoidsurface treatment layer structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent simplifies the surface treatment structure by removing intermediate nickel or nickel-phosphorus layers, keeping only the essential copper core and gold protective layer. This extraction reduces manufacturing complexity while maintaining oxidation protection.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The gold layer serves multiple functions simultaneously: it provides oxidation protection, creates a solderable surface, and eliminates the need for intermediate nickel layers. This multi-functionality reduces overall structure complexity while maintaining all necessary protective functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The gold layer deposited by immersion plating improves solder joint reliability by preventing oxidation and reducing the risk of air pore generation and over-etching, thus enhancing the overall performance of semiconductor devices.

Implementation Method 1

a gold layer is deposited on each of the wires by immersion gold plating

Methodology Applied
Scientific EffectImmersion plating: Electroplating

Data Source

PatentUS12224183B2Method of manufacturing semiconductor device
Publication Date: 2025.02.11 CHIPBOND TECH
  • US12224183B2 patent drawing
  • US12224183B2 patent drawing
  • US12224183B2 patent drawing

AI summary

A package including a first carrier, a seed layer, wires, a die and a molding material is provided. The first carrier is removed to expose the seed layer after disposing a second carrier on the molding material, then the seed layer is removed to expose the wires, and a gold layer is deposited on each of the wires by immersion gold plating, finally a semiconductor device is obtained. The gold layer is provided to protect the wires from oxidation and improve solder joint reliability.