Semiconductor Package Wire Layout for Short-Circuit Prevention
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Solution Overview
Problem
The increasing demand for high-functionality and miniaturization in semiconductor packaging leads to longer bonding wires, which can cause loops to incline and potentially short circuit with neighboring wires, especially when using forward bonding methods.
Innovation Solution
The implementation of alternately arranged upper bonding wires with varying angles and lengths, connected via a reverse bonding method, to prevent capillary contact with adjacent wires and maintain electrical integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If bonding wire length is increased to accommodate miniaturization and high-functionality requirements, then semiconductor package functionality is improved, but the bonding wire loops may incline and contact neighboring wires causing short circuits
Solution Approach 1:
The bonding wires are arranged asymmetrically with alternating angles relative to the semiconductor chip. Specifically, odd-numbered bonding wires form a first angle with the chip surface while even-numbered bonding wires form a second angle, creating an asymmetric pattern that prevents uniform looping and contact between adjacent wires, thereby maintaining electrical integrity while accommodating longer wire lengths
Solution Approach 2:
The bonding wires are configured to extend in different spatial dimensions by varying their angles relative to the semiconductor chip. This three-dimensional arrangement, where wires form different angles with the chip surface, prevents the loops from inclining in the same direction and contacting neighboring wires, thus resolving the short circuit risk associated with longer bonding wires
2Productivity
If bonding wire loops are allowed to form naturally during bonding process, then bonding efficiency is improved, but capillary contact with adjacent bonding wires occurs causing manufacturing defects
Solution Approach 1:
The bonding wires are pre-configured with specific alternating angles before the bonding process. This preliminary angular configuration ensures that as the wires are formed during bonding, their loops naturally follow predetermined trajectories that prevent contact with adjacent wires, thereby maintaining both bonding efficiency and positioning accuracy without requiring complex real-time control
Solution Approach 2:
The bonding wire parameters, specifically the angles relative to the semiconductor chip, are changed in an alternating pattern. Odd-numbered wires use one angle while even-numbered wires use another angle, creating parameter variation that prevents uniform loop formation and capillary contact, thus achieving precise wire positioning while maintaining efficient bonding
Data Source
AI summary
A semiconductor package includes a package substrate having substrate pads disposed in a first direction on one surface, a semiconductor chip having chip pads disposed in the first direction, and bonding wires connecting the chip pads and the substrate pads. The bonding wires include first and second bonding wires alternately connected to the substrate pads respectively, in the first direction, the first bonding wires are connected to the substrate pads at a first angle less than a right angle with respect to a direction of the semiconductor chip, the second bonding wires are connected to the substrate pads at a second angle less than the first angle with respect to the direction of the semiconductor chip and a position at which the first bonding wires contact the substrate pads is closer to the semiconductor chip than a position at which the second bonding wires contact the substrate pads is to the semiconductor chip.