Semiconductor Wire Configuration for On-Resistance Reduction
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Solution Overview
Problem
Conventional semiconductor devices face challenges in reducing the on-resistance due to high resistance values in the surface electrode layer and bonding wires, which are difficult to mitigate without altering the device's structure or manufacturing process.
Innovation Solution
The semiconductor device incorporates multiple first wires with connecting portions on the surface electrode layer, where the first wires have a larger circle-equivalent diameter than the surface electrode layer thickness, and a second wire with a larger cross-section, arranged in intersecting or parallel directions to reduce the resistance by increasing the contact area and connecting multiple points on the surface electrode layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the surface electrode layer is increased to reduce resistance, then the resistance of the surface electrode layer is reduced, but the device structure and manufacturing process constraints prevent further thickness increase
Solution Approach 1:
The patent transitions from increasing thickness in the vertical dimension to increasing wire diameter and contact area in the horizontal dimension. Multiple wires with larger diameters are arranged to intersect or run parallel on the surface electrode layer, creating additional current paths that reduce resistance without requiring increased layer thickness.
Solution Approach 2:
The patent divides the current path into multiple segments by using multiple wires instead of a single thick wire. The wires are arranged to intersect or run parallel, creating multiple connection points on the surface electrode layer. This segmentation distributes the current flow across multiple paths, effectively reducing the overall resistance.
2Reliability
If the diameter of bonding wire is increased to reduce resistance, then the resistance of bonding wire is reduced, but the wiring pattern and external terminal structure must be changed
Solution Approach 1:
The patent makes the surface electrode layer serve multiple functions: it acts as both the original electrode layer and as a substrate for arranging multiple wires with larger diameters. The wire arrangement structure also serves dual purposes by providing both mechanical connection and reduced resistance path. This multi-functionality allows resistance reduction without changing external terminals or wiring patterns.
3Reliability
If the number of bonding wires is increased to reduce resistance, then the resistance of bonding wire is reduced, but the area of semiconductor element and wiring pattern must be changed
Solution Approach 1:
The patent changes the parameter of wire diameter rather than increasing the number of wires. By using wires with larger diameters arranged to intersect or run parallel on the existing surface electrode layer, the resistance is reduced while maintaining the same semiconductor element area. The arrangement pattern (intersecting or parallel) optimizes space utilization.
Data Source
AI summary
A semiconductor device includes a semiconductor element having a surface electrode layer; a first wire that is electrically connected to the first main surface of the surface electrode layer at a plurality of first connecting portions and is arranged in a first direction on the first main surface; and a second wire that is electrically connected to the first main surface of the surface electrode layer at a second connecting portion and is arranged in a second direction on the first main surface, wherein a second circle equivalent diameter, which is a diameter of a circle having a same cross-sectional area as the second wire, is larger than a first circle equivalent diameter, which is a diameter of a circle having a same cross-sectional area as the first wire.