Semiconductor Wire Routing via Relay Circuit Pattern
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Solution Overview
Problem
The existing semiconductor devices face challenges with thermal fatigue and reduced productivity due to wire bonding complexities and space constraints, as well as quality issues from reverse wire bonding directions and complex electrode connections.
Innovation Solution
A semiconductor device design featuring an insulating substrate with first and second circuit patterns, semiconductor chips, and a relay circuit pattern between them, where a wire is continuously connected in one direction to the chips and circuit patterns, reducing wire bonding space and eliminating the need for complex electrode formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wires connect opposite semiconductor chips individually to the relay circuit pattern with two wire bonding places, then the relay circuit pattern can be provided between opposite semiconductor chips, but the wire bonding space increases and productivity deteriorates due to reverse wire bonding directions
Solution Approach 1:
The patent inverts the conventional wire bonding approach by having the wire pass through the relay circuit pattern rather than bonding to it from both sides. Instead of two separate wire bonding operations in reverse directions, a single wire is bonded once and routed through the relay circuit pattern to connect both semiconductor chips, eliminating the need to reverse wire bonding directions and improving productivity
2Reliability
If two wire bonding places are provided on the relay circuit pattern, then opposite semiconductor chips can be connected individually, but the wire bonding space increases and the area where semiconductor chips are mounted cannot be expanded
Solution Approach 1:
The patent merges the functions of two separate wire bonding places into a single wire bonding location. By routing a single continuous wire through the relay circuit pattern to connect both semiconductor chips, the design reduces the number of wire bonding places from two to one, thereby reducing the wire bonding space and allowing for expansion of the semiconductor chip mounting area
3Reliability
If an electrode is positioned between opposite semiconductor chips to extract signals from the relay circuit pattern, then signals can be extracted, but complex wire bonding is needed and quality deteriorates when the wire must be cut at one of the semiconductor chips
Solution Approach 1:
The patent extracts the signal extraction function from the relay circuit pattern itself by incorporating it into the continuous wire path. The wire that connects the semiconductor chips also serves as the signal extraction path, eliminating the need for separate electrodes and complex wire bonding operations. This maintains signal extraction capability while improving quality by avoiding wire cuts at semiconductor chips
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design mitigates thermal interference, reduces wire bonding space, improves productivity, and enhances quality by allowing for simpler wire connections and reduced heat generation, thereby extending the service life and efficiency of the semiconductor device.
Implementation Method 1
by connecting the wire to the relay circuit pattern, the wire can be cooled with the relay circuit pattern
Data Source
AI summary
First and second circuit patterns (5,6) are provided on an insulating substrate (1). First and second semiconductor chips (7,8) are provided on the first circuit pattern (5). A relay circuit pattern (10) is provided between the first semiconductor chip (7) and the second semiconductor chip (8) on the insulating substrate (1). A wire (11) is continuously connected to the first semiconductor chip (7), the relay circuit pattern (10), the second semiconductor chip (8) and the second circuit pattern (6) which are sequentially arranged in one direction.