Semiconductor Wiring Air Gap Formation via Thickness-Based Etching

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Solution Overview

Problem

The reduction in distance between wirings in semiconductor devices increases capacitance, leading to signal propagation issues and yield reduction due to electrical connections through leak currents, even with air gap structures.

Innovation Solution

A method involving precise etching control based on thickness information of wiring layers to form air gaps between copper-containing films, using a substrate processing apparatus with adjustable etching gas supply and bias electrodes to prevent electrical connections and maintain the integrity of air gaps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the distance between wirings is reduced to increase integration, then the capacitance between wirings increases, but signal propagation velocity decreases

Engineering Contradiction:
Improveintegration densityVSAvoidsignal propagation velocity
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

An air gap structure is introduced as an intermediary medium between adjacent copper-containing films (wirings). This air gap acts as a mediator that reduces the dielectric constant in the region between wirings, thereby reducing capacitance and improving signal propagation velocity while maintaining reduced wiring pitch for high integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If an air gap structure is formed between wirings to lower dielectric constant, then capacitance is reduced, but yield decreases due to increased electric field strength causing leak currents

Engineering Contradiction:
Improvedielectric constantVSAvoidyield
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by creating a non-uniform wiring structure where the upper surface of the lower wiring and the lower surface of the upper wiring are positioned at different heights in the vertical direction. This local variation in wiring geometry distributes the electric field more evenly, preventing excessive electric field concentration at specific points and reducing leak currents while maintaining the air gap's low dielectric constant benefit.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If air gap is formed to reduce capacitance, then dielectric constant is lowered, but electrical connections through leak currents occur

Engineering Contradiction:
ImprovecapacitanceVSAvoidleak currents
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

By positioning the upper surface of the lower wiring and the lower surface of the upper wiring at different heights, the patent creates a localized geometric variation that distributes the electric field intensity. This prevents the formation of high-field regions that would cause breakdown and leak currents, while the air gap continues to provide low capacitance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses leak currents and ensures a satisfactory yield by forming reliable air gaps, enhancing the insulation properties and reducing signal delays in semiconductor devices.

Implementation Method 1

etching the wiring layer using an etching gas based on an etching control value corresponding to the thickness information of the wiring layer

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

placing the substrate on a substrate support installed in a process chamber

Methodology Applied
Scientific Effect:

Data Source

PatentUS9991179B2Method of manufacturing semiconductor device
Publication Date: 2018.06.05 KOKUSAI DENKI KK
  • US9991179B2 patent drawing
  • US9991179B2 patent drawing
  • US9991179B2 patent drawing

AI summary

Provided is a technique capable of obtaining a satisfactory yield for a semiconductor device with an air gap. The technique includes a method of manufacturing a semiconductor device, including: (a) receiving a thickness information of a wiring layer formed on a substrate including: a first interlayer insulation film; and the wiring layer disposed on the first interlayer insulation film, the wiring layer including: copper-containing films used as wiring; and an inter-wiring insulation film having trenches filled with the copper-containing films and insulating the copper-containing films; (b) placing the substrate on a substrate support installed in a process chamber; and (c) etching the wiring layer using an etching gas based on an etching control value corresponding to the thickness information of the wiring layer.