Semiconductor Wiring Alignment via Resin Protrusion Mark
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Solution Overview
Problem
The manufacturing of semiconductor devices is costly due to the need for multiple steps to equalize internal connecting terminal heights and expose them from a resin layer, and the use of expensive exposing devices with infrared or X-ray transmitting functions, which also reduces precision in wiring pattern alignment.
Innovation Solution
A method involving a support plate with a metal layer, where a penetrating portion is formed opposite to the semiconductor chip, and a conductive terminal is pressure-bonded to the internal connecting terminal, followed by resin sealing and removal of the support plate to form a protruded alignment mark for precise wiring pattern formation using a CCD camera.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple steps are used to equalize internal connecting terminal heights and expose them from resin layer, then manufacturing precision is improved, but manufacturing cost increases and productivity decreases
Solution Approach 1:
The patent applies preliminary action by forming a protrusion on the resin layer before wiring pattern formation. This protrusion serves as a built-in alignment reference that eliminates the need for subsequent height equalization steps and resin polishing operations. The alignment mark is prepared in advance during the resin sealing process, allowing direct wiring pattern formation without additional processing steps for exposing internal connecting terminals.
2Measurement precision
If expensive exposing devices with infrared or X-ray transmitting functions are used, then measurement precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent employs a simple, inexpensive protrusion structure on the resin layer as an alignment mark instead of requiring complex expensive exposing devices. This disposable-like simple reference structure can be detected by conventional, low-cost imaging equipment. The protrusion provides sufficient alignment precision without necessitating the use of expensive infrared or X-ray transmitting exposing devices, thereby significantly reducing manufacturing equipment costs.
3Manufacturing precision
If multiple processing steps are implemented for internal connecting terminal exposure, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent merges the alignment mark formation process with the resin sealing process. The protrusion that serves as the alignment mark is formed simultaneously with the resin layer during the sealing operation, rather than as a separate subsequent step. This integration eliminates multiple discrete processing steps and reduces overall process complexity while maintaining the precision benefits of having an alignment reference for wiring pattern formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces manufacturing costs by eliminating steps for height equalization and resin polishing, and enhances precision in wiring pattern alignment with respect to internal connecting terminals.
Implementation Method 1
pressing the support plate having a metal layer to pressure bond the internal connecting terminal to the metal layer
Data Source
AI summary
An internal connecting terminal 12 is formed on electrode pads 23 of a plurality of semiconductor chips 11 formed on a semiconductor substrate 35, and there is formed a resin member 13 having a resin member body 13-1 and a protruded portion 13-2 and covering the semiconductor chips 11 on which the internal connecting terminal 12 is formed, a metal layer 39 is formed on the resin member body 13-1 and the protruded portion 13-2 is used as an alignment mark to form a resist film 48 covering the metal layer 39 in a part corresponding to a region in which a wiring pattern 14 is formed and to then carry out etching over the metal layer 39 by using the resist layer 48 as a mask, thereby forming the wiring pattern 14 which is electrically connected to the internal connecting terminal 12.