Semiconductor Wiring Connection Resistance Reduction
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Solution Overview
Problem
Conventional semiconductor manufacturing methods result in high connection resistance values between wiring layers due to the formation of oxide films in current paths, which hinder the reduction of resistance values.
Innovation Solution
A semiconductor device and manufacturing method that form an alloy layer in the connection region between second and third wiring layers, reducing the connection resistance value by creating an alloy layer where the second and third wiring layers are connected through an opening in the insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing methods are used to form wiring layers, then the device structure is simple and easy to manufacture, but oxide films form in the current path causing high connection resistance
Solution Approach 1:
The patent divides the wiring layer into multiple segments: a first wiring layer, a first metal layer in the opening region, and a second wiring layer. This segmentation allows the first metal layer to serve as a dedicated low-resistance connection path, separating the conductive function from the insulating function and thereby reducing connection resistance without significantly complicating the overall manufacturing process
Solution Approach 2:
The patent applies local quality by creating a specific opening region in the insulating layer where the first metal layer is formed. This localized modification concentrates the low-resistance connection property exactly where needed (in the current path between wiring layers) while leaving other regions unchanged, thus reducing connection resistance with minimal increase in device complexity
2Reliability
If aluminum-based wiring layers are used, then the manufacturing process is simple, but oxidation occurs exposing the wiring layer surface causing high resistance
Solution Approach 1:
The patent performs preliminary action by forming the first metal layer in the opening region before forming the second wiring layer. This preliminary placement of the low-resistance metal layer ensures that when the second wiring layer is subsequently formed and connected, the oxidation-resistant low-resistance path is already in place, improving electrical conductivity without requiring complex additional manufacturing steps
Solution Approach 2:
The first metal layer acts as an intermediary between the first wiring layer and the second wiring layer. It mediates the electrical connection by providing a low-resistance path that is less susceptible to oxidation, thereby improving electrical conductivity while maintaining manufacturing simplicity through the use of standard metallization techniques
Data Source
AI summary
A conventional semiconductor device has a problem that reduction of a connection resistance value between wiring layers is difficult because of an oxide film formed between the wiring layers. In a semiconductor device of this invention, a first metal layer is embeded in opening regions which connect a first wiring layer and a second wiring layer and an opening is formed in a spin coated resin film formed on the first metal layer. In the opening, a Cr layer forming a plating metal layer and a Cu plated layer are connected to each other. With this structure, the spaces among crystal grains in portions in the Cr layer on the first metal layer are wide, which causes the portions to be coarse. In the coarse portions in the Cr layer, an alloy layer formed of the second metal layer and the Cu plated layer is formed, and thus, the connection resistance value is reduced.