Semiconductor Wiring Charge Recycling Timing Optimization
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Solution Overview
Problem
Conventional electrical charge recycling techniques in semiconductor integrated circuits often fail to satisfy timing constraints due to increased delay times, leading to potential power consumption issues.
Innovation Solution
A method for designing semiconductor integrated circuits that determines specific wirings for signal propagation and electrical charge storage, optimizing the use of reserved wirings to minimize power consumption while adhering to timing constraints based on signal operation rates and delay times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If electrical charge recycling technique is applied to reduce power consumption, then power consumption is reduced, but timing constraints are not satisfied due to increased delay time
Solution Approach 1:
The patent changes the parameters of the wiring network by introducing reserved wirings with specific characteristics (capacitance values, delay times) to enable charge recycling. The design selectively assigns wirings based on their electrical parameters to balance power consumption reduction with timing constraint satisfaction.
Solution Approach 2:
The patent introduces reserved wirings as intermediary elements between signal propagating wirings and ground. These reserved wirings act as charge storage intermediaries that enable power reduction without directly interfering with the signal propagation timing.
2Loss of energy
If reserved wirings are used for electrical charge storage, then power consumption is reduced through charge recycling, but device complexity increases
Solution Approach 1:
The reserved wirings serve multiple functions: they act as charge storage elements for power reduction, provide additional routing paths for signals, and can be configured as pull-down or pull-up networks. This multi-functionality reduces the need for separate dedicated components.
Solution Approach 2:
The patent merges the charge recycling function with the existing wiring network structure. Instead of adding separate recycling circuits, the design integrates charge storage capability directly into the wiring layer by utilizing reserved wirings that are part of the standard FPGA interconnect fabric.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces power consumption by strategically utilizing reserved wirings for electrical charge recycling, ensuring that timing constraints are met and power efficiency is enhanced.
Implementation Method 1
determining the second wiring to be used as a wiring for storing electrical charge
Data Source
AI summary
A method for designing a semiconductor integrated circuit includes: determining, by a designing device, first wirings over which signals are propagated and second wirings which are not used for propagation of the signals among a plurality of wirings of a semiconductor integrated circuit; and determining, by the designing device, from among the second wirings, third wirings to be used for storing electrical charges for electrical charge recycling of the first wirings for a most number of the first wirings in a range that satisfies a timing constraint based on operation rates of the signals propagated over the first wirings and delay times of the first wirings.