Semiconductor Wiring Local Dielectric Cap Electromigration Lifetime

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Solution Overview

Problem

Early electromigration-induced failure in interconnects fabricated using dual-damascene processes leads to reduced current limits in integrated circuit chips, with via voiding causing premature failures and line voiding requiring larger void sizes for failure, resulting in uneven electromigration lifetime.

Innovation Solution

A semiconductor wiring structure with a local dielectric cap positioned within a metal cap layer, intentionally creating a weak point in the metal wiring line to induce electromigration voiding, rather than at the via, thereby increasing the electromigration lifetime by utilizing a dielectric layer and metal cap layer with specific materials like silicon nitride and tantalum.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a dual-damascene interconnect structure is used, then the wiring complexity is reduced and manufacturing is simplified, but electromigration-induced via voiding occurs early leading to reduced reliability

Engineering Contradiction:
Improvewiring structure fabricationVSAvoidelectromigration lifetime
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A local dielectric cap is deposited over the via region before final metal filling, creating a protective barrier that prevents electromigration voiding at the via bottom. This preliminary protective action ensures via integrity while allowing the dual-damascene process to proceed with reduced complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dielectric cap is applied locally only to the via region rather than uniformly across the entire interconnect structure. This localized protection targets the specific vulnerability point (via bottom) without adding unnecessary complexity to other regions, maintaining ease of manufacture while improving reliability

Inventive Principle:
Principle #3Local quality

2Strength

If the metal cap layer is made continuous over the metal wiring line, then structural integrity is improved, but electromigration voiding is suppressed in the line leading to later fails with larger critical void sizes

Engineering Contradiction:
Improvestructural integrityVSAvoidelectromigration failure timing
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The metal cap layer is segmented by introducing a local dielectric cap within it, creating a discontinuous structure over the via region. This segmentation allows the metal cap to maintain structural integrity in most regions while creating a controlled weak point that promotes earlier, more predictable voiding behavior with larger critical void sizes

Inventive Principle:
Principle #1Segmentation

3Reliability

If via voiding is prevented, then early electromigration failures are reduced, but the critical void size required for line fails increases leading to later failures

Engineering Contradiction:
Improvevia integrityVSAvoidelectromigration lifetime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The local dielectric cap acts as an intermediary element that modifies the electromigration voiding process. It prevents voiding at the via bottom while promoting controlled voiding in the metal wiring line above, where the larger critical void size results in later but more predictable failures, effectively mediating between via protection and line failure timing

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure significantly extends the electromigration lifetime by promoting voiding in the metal wiring line instead of the via, reducing the time needed for nucleation and increasing the overall lifetime associated with line-voiding.

Implementation Method 1

electromigration (EM) induced failure in interconnects is a major concern for advanced back-end-of-line (BEOL) technology

Methodology Applied
Scientific EffectElectromigration:

Data Source

PatentUS7732924B2Semiconductor wiring structures including dielectric cap within metal cap layer
Publication Date: 2010.06.08 X CORP
  • US7732924B2 patent drawing
  • US7732924B2 patent drawing
  • US7732924B2 patent drawing

AI summary

Semiconductor wiring structures including a dielectric layer having a metal wiring line therein, a via extending downwardly from the metal wiring line, a metal cap layer over the metal wiring line, and a local dielectric cap positioned within a portion of the metal cap layer and in contact with the metal wiring line and a related method are disclosed. The local dielectric cap represents an intentionally created weak point in the metal wiring line of a dual-damascene interconnect, which induces electromigration (EM) voiding in the line, rather than at the bottom of a via extending downwardly from the metal wiring line. Since the critical void size in line fails, especially with metal cap layer (liner) redundancy, is much larger than that in via fails, the EM lifetime can be significantly increased.