Semiconductor Wiring Dummy Structures for Etching Uniformity
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Solution Overview
Problem
In semiconductor device miniaturization, fine pitch wiring designs face challenges with conductive line width less than 10 μm, where dense and sparse regions experience different etching impacts, leading to excessive etching and potential peeling of conductive lines due to uneven etching solution application.
Innovation Solution
A wiring structure with a dielectric layer and a patterned conductive layer featuring conductive lines and isolated dummy conductive structures, where the ratio of the area occupied by conductive lines and dummy structures in sparse regions to the area in dense regions is set to be greater than or equal to 80%, absorbing excessive etching solution and controlling critical dimension loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If fine pitch wiring design is used to miniaturize semiconductor devices, then device size is reduced and performance is improved, but conductive lines become susceptible to over-etching and peeling in sparse regions
Solution Approach 1:
Dummy conductive structures are added in advance to sparse regions before the etching process. These dummy structures serve as placeholders that absorb excess etching solution, preventing over-etching of the actual conductive lines in sparse regions while maintaining the fine pitch design for miniaturization.
Solution Approach 2:
The wiring structure is differentiated into dense regions and sparse regions, with dummy conductive structures selectively added only to sparse regions. This local modification ensures that etching solution distribution is balanced across different regions, protecting conductive line integrity in sparse areas without affecting the miniaturized design overall.
2Ease of manufacture
If constant amount of etching solution is applied to both dense and sparse regions, then manufacturing process is simplified, but sparse regions experience excessive etching and critical dimension loss
Solution Approach 1:
Dummy conductive structures are selectively placed in sparse regions to create local etching solution absorption zones. This allows the use of a constant etching solution application amount across the entire substrate while achieving balanced etching results in both dense and sparse regions, maintaining manufacturing precision without complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents over-etching and reduces the risk of conductive line peeling, achieving uniform etching and maintaining low critical dimension loss, thereby enhancing the reliability and performance of semiconductor packages.
Implementation Method 1
The number of dummy conductive structures are isolated from each of the number of conductive lines... absorbing excessive etching solution and controlling critical dimension loss
Implementation Method 2
Subsequent to the formation of conductive lines, an etching process can be performed by, for example, a spin coater to remove the exposed seed layer. The amount of metal that is etched away by an etching solution per milliliter is, in some cases, approximately constant.
Implementation Method 3
When spin coating is used for etching, the amount of an etching solution used in a dense region and at least one sparse region can thus be constant.
Data Source
AI summary
A wiring structure includes a dielectric layer and a first patterned conductive layer on the dielectric layer. The dielectric layer has a first region and a second region. The first patterned conductive layer includes a number of fine conductive lines and a number of dummy conductive structures. The number of conductive lines include a first number of conductive lines on the first region and a second number of conductive lines on the second region, and the number of dummy conductive structures include a first number of dummy conductive structures on the second region. The first number of conductive lines occupy a first area on the first region, and the second number of conductive lines and the first number of dummy conductive structures occupy a second area on the second region. A ratio of the second area to the first area is greater than or equal to about 80%.