Semiconductor Wiring Layer With Conductive Members for Heat Control
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Solution Overview
Problem
The reduction of circuit pattern area in semiconductor devices leads to increased wiring resistance, resulting in Joule heat generation and potential semiconductor chip failure due to inadequate heat dissipation.
Innovation Solution
Incorporating conductive members on the surface of the wiring layers of the semiconductor device, which reduce wiring resistance and mitigate temperature rises by allowing current to flow through these members, thereby improving heat dissipation and chip reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the area of circuit pattern is reduced to downsize the insulated circuit board, then the size of semiconductor device is reduced, but the wiring resistance increases and Joule heat is generated
Solution Approach 1:
The patent introduces a wiring layer extending in the thickness direction (vertical dimension) of the insulated circuit board, transforming the traditional planar circuit pattern into a three-dimensional structure. This allows current to flow through multiple layers, effectively increasing the conductive cross-sectional area without increasing the board's footprint, thereby reducing wiring resistance while maintaining compact size.
Solution Approach 2:
The patent employs a composite wiring structure combining conductive members (such as solder bumps or conductive paste) with the insulated circuit board material. This composite approach creates low-resistance pathways through the wiring layer, enabling efficient current flow and heat dissipation in the vertical dimension while keeping the overall device size reduced.
2Power
If more semiconductor chips are disposed on the insulated circuit board to handle greater current, then the current handling capacity is increased, but the wiring resistance increases if the circuit pattern area is insufficient
Solution Approach 1:
The patent utilizes the thickness direction of the insulated circuit board to create additional wiring pathways. By extending wiring layers vertically through multiple conductive members, the effective conductive area is increased without occupying more planar space, enabling the board to handle greater current from multiple semiconductor chips without excessive wiring resistance.
3Volume of moving object
If the circuit pattern area is reduced, then the size of the insulated circuit board is reduced, but the temperature of semiconductor chip rises due to increased wiring resistance
Solution Approach 1:
The patent creates three-dimensional wiring pathways that extend vertically through the insulated circuit board. This dimensional transformation increases the effective heat dissipation area by allowing heat to conduct through the thickness direction via the wiring layer and conductive members, effectively cooling semiconductor chips without increasing the board's planar dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of conductive members on the wiring layers effectively reduces wiring resistance and temperature increases, enabling the downsizing of semiconductor modules while maintaining reliability and allowing for more flexible semiconductor chip placement.
Implementation Method 1
a wiring layer electrically connected to at least one of the first main electrode or the second main electrode, the wiring layer including a conductive member disposed on a front surface
Implementation Method 2
the wiring resistance with respect to a current that flows through the circuit pattern increases. In addition, if the wiring resistance increases, Joule heat is generated at the corresponding portion
Data Source
AI summary
A semiconductor device includes a semiconductor chip that has a first main electrode on a rear surface thereof and a second main electrode on a front surface thereof, and a wiring layer electrically connected to at least one of the first main electrode or the second main electrode. The wiring layer includes a conductive member that is disposed on a front surface of the wiring layer.