Semiconductor Wiring Layout Reducing Inductance
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Solution Overview
Problem
In semiconductor devices with power control transistors, long lines between the drain electrode of the transistor and the cathode electrode of the diode can lead to increased inductance, which slows down switching speed due to the electrical current flow between these components.
Innovation Solution
The arrangement of transistors and diodes on a substrate with branching lines that overlap both components, allowing for shorter lines between the drain electrode of the transistor and the cathode electrode of the diode, thereby reducing inductance and enhancing switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the line between the drain electrode of the transistor and the cathode electrode of the diode is long, then the layout flexibility is improved, but the inductance increases and switching speed decreases
Solution Approach 1:
The patent introduces a first line extending in a first direction between the transistor and diode, with branch lines extending in a second direction (perpendicular to the first direction) to connect to the transistor and diode respectively. This two-dimensional wiring layout allows the main current path to be shortened while maintaining flexible component placement, thereby reducing inductance without sacrificing layout adaptability.
2Adaptability or versatility
If the line between the drain electrode of the transistor and the cathode electrode of the diode is long, then the component placement flexibility is improved, but the inductance of the line increases
Solution Approach 1:
The patent employs a two-dimensional wiring structure where a first line extends in one direction and branch lines extend perpendicular to it, creating a compact current path that minimizes inductance while allowing flexible component placement.
Solution Approach 2:
The wiring structure is segmented into a main first line and multiple branch lines, allowing the current path to be optimized independently for each component connection while maintaining overall flexibility in component arrangement.
Data Source
AI summary
Reduction of the speed of switching between the drain electrodes of transistors and the cathode electrodes of diodes due to the inductances of lines coupling them is inhibited. Transistors and diodes are formed over a substrate. The transistors and the diodes are arranged in a first direction. The substrate also includes a first line, first branch lines, and second branch lines formed thereover. The first line extends between the transistors and the diodes. The first branch lines are formed to branch from the first line in a direction to overlap the transistors and are coupled to the transistors. The second branch lines are formed to branch from the first line in a direction to overlap the diodes and are coupled to the diodes.


