Semiconductor Wiring Patterns for LCD Substrate Routing
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Solution Overview
Problem
Semiconductor devices for liquid crystal displays face challenges in reducing size and weight while maintaining performance, particularly due to the need for extensive wiring and variations in output AC characteristics, which increase the surface area and require thick power and ground wiring.
Innovation Solution
A semiconductor device with a rectangular semiconductor element mounted on a substrate featuring external input and output terminals, along with specific wiring patterns connecting first, second, and third electrodes, allowing for even power supply to functional blocks without increasing internal wiring, thus reducing the surface area and maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large number of wiring regions are provided in the semiconductor element to satisfy the requirement of output terminals exceeding 720, then the requirement for output terminals is met, but the surface area of the semiconductor element becomes particularly large
Solution Approach 1:
The patent extends wiring patterns from the semiconductor element surface to the substrate, utilizing the substrate as an additional dimensional space for routing. This allows output terminals to exceed 720 without increasing the semiconductor element's surface area, as wiring continues on the substrate plane rather than being confined to the element surface.
Solution Approach 2:
The substrate acts as an intermediary between the semiconductor element and the external environment. By routing wiring patterns through the substrate, the patent enables connection of numerous output terminals without requiring proportional increases in the semiconductor element's wiring region area.
2Reliability
If thick power supply wiring and ground wiring are provided throughout the semiconductor element to achieve low impedance and even power supply, then power supply stability is improved, but the surface area of the semiconductor device is increased
Solution Approach 1:
The patent relocates thick power supply and ground wiring from the semiconductor element surface to the substrate. This dimensional transition allows low-impedance power distribution throughout the device without consuming precious semiconductor element surface area, maintaining power supply stability while reducing overall device footprint.
Solution Approach 2:
The substrate serves as an intermediary for power distribution, carrying thick power supply and ground wiring patterns that provide low impedance paths. This separates the power distribution function from the semiconductor element, enabling stable power supply without increasing the element's active area.
3Area of moving object
If connection wirings are substituted for wirings routed on or under the surface of the element to reduce size and weight, then the size and weight of the semiconductor element are reduced, but variations in output AC characteristics between output terminals must be carefully controlled
Solution Approach 1:
The patent moves wiring patterns to the substrate plane, reducing the semiconductor element's surface area and weight. The substrate provides a controlled environment for wiring patterns that maintains electrical characteristic consistency across output terminals while enabling compact element design.
Solution Approach 2:
The patent controls wiring pattern parameters (trace width, spacing, length) on the substrate to maintain consistent electrical characteristics across all output terminals. By carefully designing these parameters, the patent achieves both size reduction and characteristic consistency.
Data Source
AI summary
A semiconductor device includes a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and the external output terminal. The semiconductor element includes, a plurality of first electrodes formed along a first edge of a surface thereof, a plurality of second electrodes formed along an edge opposite to the first edge of the surface, a plurality of third electrodes formed in the neighborhood of a functional block, and an internal wiring for connecting the first electrodes and the third electrodes. The substrate includes, a first wiring pattern for connecting the external input terminal and the first electrodes, a second wiring pattern for connecting the external output terminal and the second electrodes, and a third wiring pattern for connecting the first electrodes and the third electrodes.