Semiconductor Chip Package Wiring-Added Post Electrode Method
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Solution Overview
Problem
Conventional semiconductor chip packages require the use of through wiring techniques to expose electrodes on a side opposite the substrate, which complicates and costs the manufacturing process, especially for image sensor and high-power LSI packages.
Innovation Solution
A method involving the formation of a wiring-added post electrode component with a support plate, where a semiconductor chip is mounted on the component, sealed with resin, and the support plate is separated to form external electrodes on the back face without the need for through holes in the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through wiring technique is used to expose electrodes on the back face, then electrodes can be connected to external terminals, but the manufacturing process becomes complicated and costly
Solution Approach 1:
The patent divides the electrode connection function into two separate components: wiring layers formed on the substrate and post electrodes formed separately on the back face. This segmentation eliminates the need for complex through-hole formation while achieving the same electrical connection function, thereby reducing manufacturing complexity.
Solution Approach 2:
The patent introduces an intermediary structure (the combination of wiring layers and post electrodes) that mediates between the substrate and external terminals. Instead of directly connecting through the substrate, the electrical connection is achieved through this intermediary path, simplifying the overall manufacturing process.
2Reliability
If through holes are formed in the substrate, then electrodes can be exposed on the back face, but substrate thickness must be reduced which requires additional support structures
Solution Approach 1:
The patent segments the electrode structure into wiring layers on the substrate surface and post electrodes on the back face, eliminating the need for through-holes. This maintains substrate integrity and thickness while achieving electrode exposure, thus preserving substrate strength without requiring additional support structures.
Solution Approach 2:
Instead of forming holes through the substrate to expose electrodes, the patent inverts the approach by forming post electrodes on the back face that connect to wiring layers on the front surface. This reverse engineering approach eliminates substrate penetration while achieving the same functional result.
Data Source
Figure 1(A)~1(B)
Figure 2(A)~2(B)
Figure 3(A)~3(B)
AI summary
A first wiring pattern is formed on a surface of a first support plate; a semiconductor chip is disposed on the first wiring pattern; and electrode terminals of the semiconductor chip are electrically connected to the first wiring pattern at required positions. Post electrodes connected to a second wiring pattern of a wiring-added post electrode component integrally connected by a second support plate are collectively fixed and electrically connected to the first wiring pattern formed on the first support plate at predetermined positions. After sealing with resin, the first and second support plates are separated; a glass substrate is affixed on a front face side; and external electrodes connected to the second wiring pattern are formed on a back face side.