Semiconductor Design Assist for Wiring Route Search
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Solution Overview
Problem
In post-mask engineering change orders (ECO) for semiconductor integrated circuits, designers face challenges in efficiently finding optimal wiring routes that satisfy multiple design rules, leading to complex operations and increased development time due to limited cost calculating formulas and strict search conditions, especially with multi-layered wiring and dummy metals in the layout data.
Innovation Solution
A semiconductor design assisting device that searches for multiple wiring routes based on various cost calculating formulas representing different design rules and generates display information for user selection, allowing for simultaneous consideration of timing, wiring-density, and wiring-layer-number rules without requiring sequential processing or manual modification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple cost calculating formulas representing different design rules are used to search for wiring routes, then the ability to satisfy multiple design rules (timing, wiring-density, wiring-layer-number) is improved, but the device complexity and operational complexity increase
Solution Approach 1:
The patent divides the complex search problem into independent segments by allowing separate cost calculating formulas to be applied to different ECO nets independently. Each ECO net can be processed with its own optimized cost formula without affecting other nets, thus reducing overall system complexity while maintaining multi-rule satisfaction capability.
Solution Approach 2:
The patent enables dynamic selection and application of different cost calculating formulas based on specific design rules (timing, wiring-density, wiring-layer-number). By changing the parameter set (cost formula) according to the specific design rule requirements, the system can optimize each search independently without being constrained by a single fixed formula.
2Manufacturing precision
If sequential processing is used to ensure wiring routes satisfy design rules, then manufacturing precision is improved, but productivity and development time worsen
Solution Approach 1:
The patent performs preliminary actions by pre-defining multiple cost calculating formulas that represent different design rules before the actual wiring search. These formulas are prepared in advance and can be independently applied to different ECO nets, eliminating the need for sequential processing and manual verification while maintaining high precision.
Solution Approach 2:
The system enables self-service by automatically selecting and applying appropriate cost calculating formulas to each ECO net based on its specific requirements. The automated search process independently determines optimal wiring routes that satisfy design rules without requiring manual intervention or sequential verification, thus improving both precision and productivity.
3Ease of operation
If manual modification of wiring routes is performed to satisfy design rules, then ease of operation is improved, but loss of time and productivity worsen
Solution Approach 1:
The patent implements self-service by enabling the automated search system to independently satisfy design rules through appropriate cost calculating formulas. This eliminates the need for manual modification while preserving designer control, as the automated process produces results that directly meet the specified design requirements without time-consuming manual adjustments.
4Manufacturing precision
If strict search conditions are applied to find optimal wiring routes, then manufacturing precision is improved, but device complexity and operational difficulty increase
Solution Approach 1:
The patent segments the strict search conditions into separate, independent cost calculating formulas, each representing a specific design rule. By dividing the complex search conditions into manageable segments that can be independently applied to different ECO nets, the system maintains high precision requirements while reducing the operational difficulty of managing and applying these conditions.
Data Source
AI summary
A memory stores layout data of a semiconductor circuit. A processor searches for a plurality of wiring routes on the basis of a plurality of cost calculating formulas that respectively represent a plurality of design rules, and on the basis of the layout data, wherein the plurality of wiring routes are a plurality of candidates for a wiring route that corresponds to a processing target net that is connection information that needs to be changed in the semiconductor circuit, and respectively satisfy the plurality of design rules. Then, the processor generates display information that displays the plurality of wiring routes obtained by the search.