Semiconductor Wiring Layout With Self-Aligned Small Via Formation

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Solution Overview

Problem

The challenge in manufacturing semiconductor devices lies in forming small vias that accurately align with transmission lines, as current methods struggle to precisely locate and fabricate these structures, leading to manufacturing difficulties.

Innovation Solution

The approach involves forming transmission lines and vias using a multi-step process with phototools and stop layers, where overlapping patterns define regions for cavity formation, allowing for the creation of vias that are integral with the transmission lines, enabling accurate alignment and reduced manufacturing complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional via formation methods are used, then the manufacturing process is simple, but the via size cannot be sufficiently small and alignment precision is poor

Engineering Contradiction:
Improvevia alignment precision and via sizeVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The via formation process is segmented into multiple lithography and etching steps. First, a via mask is formed and a first etch creates a via opening. Then, a trench mask is formed and a second etch creates a trench. This segmentation allows independent optimization of via size and alignment precision without compromising process simplicity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The via opening is formed in advance before the trench formation. The via mask and first etch step prepare the via opening preliminarily, establishing a precise alignment reference before the trench mask and second etch step create the trench. This preliminary action ensures that the final conductor structure achieves both small via size and high alignment precision

Inventive Principle:
Principle #10Preliminary action

2Productivity

If separate filling operations are used for trench and via, then the process is simpler to control, but productivity is reduced due to multiple deposition steps

Engineering Contradiction:
Improvevia formation efficiencyVSAvoiddeposition process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The trench filling and via filling operations are merged into a single conductor deposition step. The conductor material is deposited simultaneously to fill both the trench and the via opening, eliminating the need for separate deposition processes. This merging significantly improves productivity while the underlying segmented etching process maintains controllability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The conductor structure formed is composite in nature, filling both the trench and via opening in a single operation. This composite filling approach allows the deposition process to handle multiple structures simultaneously, improving efficiency without requiring complex separate deposition sequences

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20240071425A1Semiconductor wiring device and method
Publication Date: 2024.02.29 MICRON TECHNOLOGY INC
  • US20240071425A1 patent drawing
  • US20240071425A1 patent drawing
  • US20240071425A1 patent drawing

AI summary

Apparatus and methods are disclosed, including transistors, semiconductor devices and systems. Example semiconductor devices and methods include a first transmission line and a second transmission line located over one another. A via is shown connecting the first transmission line and a second transmission line wherein a first side of the via and a side of the second transmission line are coplanar. A via is also shown connecting the first transmission line and a second transmission line wherein the second transmission line tapers downward from a line width to a via width.