3D Semiconductor Package Wiring Optimization
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Solution Overview
Problem
Current methods for designing wiring in three-dimensional semiconductor packages face challenges in optimizing net length and byte skew, which are crucial for high-density and high-performance electronics packaging, particularly in Package-on-Package (PoP) configurations.
Innovation Solution
A special purpose processor is used to design wiring by applying a combination of greedy and genetic processes, optimizing initial solutions for terminal connections between packages and adjusting net length and byte skew through a second sub-process, ensuring efficient and effective electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional wiring design methods are used for 3D semiconductor packages, then the basic electrical connections can be established, but the net length and byte skew cannot be optimized, resulting in higher production time and cost
Solution Approach 1:
The patent applies preliminary action by pre-calculating and pre-arranging wiring paths before actual package assembly. The special purpose processor performs net assignment and wiring layout optimization in advance, determining connection paths between terminals of first and second packages before physical manufacturing, thereby reducing production time and optimizing net length and byte skew.
Solution Approach 2:
The patent replaces conventional manual or basic automated wiring design with a special purpose processor that uses intelligent algorithms. This substitution of mechanical/electronic systems with a specialized computing system enables complex optimization of wiring connections, achieving better net length and byte skew control while reducing overall production time.
2Productivity
If simple wiring connection methods are used, then the design process is faster, but the net length and byte skew are not optimized, affecting package performance
Solution Approach 1:
The patent implements feedback by using the special purpose processor to calculate and evaluate wiring connection quality metrics (net length and byte skew) and adjust the wiring design accordingly. The system provides feedback on connection optimization and modifies the wiring layout to achieve both speed and reliability goals.
Solution Approach 2:
The patent applies parameter changes by adjusting multiple wiring design parameters simultaneously, including net length, byte skew, terminal assignment, and connection path selection. The special purpose processor optimizes these parameters to achieve the best balance between design speed and signal transmission quality.
3Device complexity
If traditional net assignment methods are used, then the wiring design is simpler, but the byte skew cannot be controlled, impacting high-speed signal transmission
Solution Approach 1:
The patent applies segmentation by dividing the net assignment process into multiple stages: initial terminal identification, intermediate wiring path generation, and final optimization based on byte skew and net length criteria. This segmented approach manages complexity while achieving precise byte skew control for high-speed signals.
Solution Approach 2:
The patent replaces traditional simple net assignment methods with a special purpose processor that uses intelligent algorithms to handle complex terminal matching and wiring optimization. This substitution enables precise byte skew control while managing the complexity of net assignment through automated calculation and optimization.
Data Source
AI summary
A three-dimensional semiconductor package and method for making the same include providing a first package layout parameter for a plurality of first terminals included in a first package, a second package layout parameter for a plurality of second terminals included in a second package disposed above or below the first package, and a connection terminal layout parameter for a plurality of connection terminals electrically connecting the first package and the second package; providing a first wiring connection layout between the first and second terminals and the connection terminals by applying a first process to the first package, second package, and connection terminal layout parameters; and providing a second wiring connection layout between the first and second terminals and the connection terminals by applying a second process, which is different from the first process, to the first wiring connection layout.