Semiconductor Wiring Substrate Signal Integrity via Layer Segmentation

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Solution Overview

Problem

In semiconductor devices with data communication circuits, maintaining equal characteristics such as characteristic impedance and maximum crosstalk across multiple signal transmission paths while minimizing impedance in power supply paths is challenging, especially when aiming to miniaturize the device and increase density.

Innovation Solution

The semiconductor device incorporates a wiring substrate with multiple layers, including a first region overlapping with the semiconductor chip and a second region surrounding it, featuring data terminals and data wirings that straddle the border between these regions, with ground patterns and power supply patterns strategically arranged to equalize signal transmission path characteristics and reduce impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the signal transmission path and power supply path are arranged at higher density to miniaturize the semiconductor device, then the device size is reduced, but the characteristics of the signal transmission path (characteristic impedance, crosstalk) and power supply path (impedance) become difficult to maintain

Engineering Contradiction:
Improvedevice sizeVSAvoidsignal transmission path characteristics
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The wiring substrate is divided into a first region overlapping with the semiconductor chip and a second region surrounding the first region. Data terminals are arranged in the first region facing the data electrodes, while data wirings straddle the border between the first and second regions. This segmentation allows for optimized arrangement of signal paths and power supply paths, maintaining characteristic impedance and reducing crosstalk even at high density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the wiring substrate are assigned different functions: the first region is optimized for signal transmission with data terminals facing the semiconductor chip electrodes, while the second region provides surrounding support. This local differentiation enables precise control of signal characteristics in the first region while maintaining overall device miniaturization.

Inventive Principle:
Principle #3Local quality

2Volume of moving object

If data terminals for different byte data signals are arranged next to each other to increase density, then the device is miniaturized, but crosstalk between adjacent data terminals increases

Engineering Contradiction:
Improvedevice sizeVSAvoidcrosstalk between data terminals
Core Design Contradiction:
Volume of moving objectVSObject-generated harmful factors

Solution Approach 1:

Data terminals for different byte data signals (first byte and second byte) are arranged in different wiring layers. The first data terminals are in one layer while the second data terminals are in another layer, with data wirings straddling the border between regions in different layers. This three-dimensional arrangement reduces crosstalk between adjacent data terminals while maintaining high density and miniaturization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10937753B1Semiconductor device
Publication Date: 2021.03.02 RENESAS ELECTRONICS CORP
  • US10937753B1 patent drawing
  • US10937753B1 patent drawing
  • US10937753B1 patent drawing

AI summary

A semiconductor device comprising: a semiconductor chip; and a wiring substrate having: a first region overlapping with the semiconductor chip, and a second region surrounding the first region in plan view. Also, the wiring substrate includes: a first wiring layer, a third wiring layer, and a plurality of data wirings arranged so as to straddle a border between the first region and the second region. Also, the plurality of data wirings includes: a first data wiring transmitting a first byte data signal, and a second data wiring transmitting a second byte data signal. Also, in the first wiring layer, the first data wiring is arranged so as to straddle the border. Also, in the third wiring layer, the second data wiring is arranged so as to straddle the border. Further, in plan view, the first data wiring and the second data wiring are overlapped with each other.