Semiconductor Interlayer Withstand Voltage Test Structure
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Solution Overview
Problem
Existing semiconductor integrated circuit technologies face challenges in detecting insulation withstand voltage defects due to variations in interlayer film thickness, making it difficult to perform effective withstand voltage inspections on interlayer insulating films, especially in multilayer wiring structures.
Innovation Solution
A semiconductor integrated circuit structure featuring a laminated chip formation region with seal rings and relay regions, along with voltage application and pad regions, allows for the application of voltage between insulated seal rings to measure leak current, enabling comprehensive withstand voltage testing across multiple wiring layers, considering variations in interlayer film thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a wiring layer dedicated to interlayer withstand voltage test is formed on a whole semiconductor integrated circuit formation region, then the interlayer withstand voltage test can be performed for every formation region, but it has a problem in structure where the insulation withstand voltage defect caused by thinning of interlayer film due to variations in thickness is not easy to be detected
Solution Approach 1:
The patent applies local quality by creating a test region with specifically controlled interlayer film thickness that differs from the normal chip formation region. The test region is designed to have a predetermined thickness that allows for reliable detection of insulation withstand voltage defects, while the chip formation region maintains its own thickness requirements for functional operation. This local differentiation enables the test structure to have optimized properties for defect detection without compromising the overall circuit functionality.
2Reliability
If a monitor element is provided in a region outside an operation circuit region on a chip, then an interlayer withstand voltage test can be performed, but it is not easy to individually perform the detection of the insulation withstand voltage defect on each interlayer film in the multilayer wiring structure
Solution Approach 1:
The patent segments the test structure into multiple independent test regions, each corresponding to a specific interlayer film between adjacent wiring layers. Each test region includes through-holes formed in the interlayer insulating film and wiring layers, allowing individual voltage application and leak current measurement for each specific interlayer interface. This segmentation enables separate testing of each interlayer film's insulation properties rather than testing them as a single aggregated unit.
Solution Approach 2:
The test structure is designed with multi-functionality to serve both as a structural framework for the overall interlayer withstand voltage test and as individual test units for each specific interlayer film. The wiring layers, interlayer insulating films, and through-hole structures serve dual purposes: maintaining the multilayer wiring structure integrity while simultaneously providing accessible test points for individual film testing through the external voltage application terminals.
3Productivity
If the number of transistors to fill up a unit area is increased, then miniaturization and reduction in size and low cost are achieved, but the number of wiring lines connecting the transistors is also increased, so that formation of a multilayer wiring line is required
Solution Approach 1:
The patent incorporates the interlayer withstand voltage test structure into the manufacturing process at an early stage, before the complete multilayer wiring structure is finalized. The test regions with through-holes and voltage application terminals are prepared in advance during the interlayer insulating film formation process, allowing subsequent wiring layers to be built around this pre-established test framework. This preliminary preparation simplifies the overall manufacturing process by integrating test capability formation into the existing multilayer wiring fabrication sequence rather than requiring separate post-processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables reliable interlayer withstand voltage testing by generating a potential difference between wiring layers, effectively detecting defects and ensuring the semiconductor integrated circuit operates within safe voltage ranges, preventing issues like dielectric breakdown.
Implementation Method 1
withstand voltage measuring wiring lines insulated from each other and different from each other by connecting one of the seal rings and one of the relay regions through one of the vias
Implementation Method 2
measuring wiring lines different from each other are configured to apply a voltage between insulated seal rings provided on the wiring layers adjacent to each other by applying a voltage between the voltage application region and the voltage applying pad
Implementation Method 3
a plurality of vias formed between the wiring layers adjacent to each other
Data Source
AI summary
A voltage application region and a voltage applying pad form withstand voltage measuring wiring lines insulated from each other and different from each other by connecting a seal ring and a relay region through a via, and the withstand voltage measuring wiring lines different from each other are configured to apply a voltage between insulated seal rings provided on wiring layers adjacent to each other by applying a voltage between the voltage application region and the voltage applying pad.