Semiconductor Structure With Depth-Controlled Word Lines

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Solution Overview

Problem

As the size of Dynamic Random Access Memory (DRAM) reduces, the coupling effect between Field Pass Gates (FPGs) and active areas increases, leading to higher leakage current and row hammer effects, causing data loss or interference in memory cells.

Innovation Solution

The semiconductor structure involves forming isolation trenches in the substrate to create active areas with word line structures, where the depth of the first word line structures in isolation trenches is controlled to be equal to or slightly larger than the depth of the second word line structures in active areas, using a gate insulating layer, gate layer, and gate dielectric layer, with materials like polysilicon and silicon nitride, to reduce leakage current paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory size is reduced to increase integration density, then productivity and storage capacity improve, but coupling effect between FPGs and active areas increases causing higher leakage current and row hammer effects

Engineering Contradiction:
Improvememory integration densityVSAvoidleakage current and row hammer effect
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The substrate is divided into multiple isolation trenches that segment the active areas, physically separating them to reduce coupling effects. The first word line structures are placed in isolation trenches while second word line structures are placed in active areas, creating spatial segmentation that reduces interference between adjacent memory cells.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different depth positions are assigned to different regions: first word line structures in isolation trenches are positioned at a first depth, while second word line structures in active areas are positioned at a second depth. This local differentiation optimizes the depth control to minimize leakage current paths in isolation regions while maintaining functionality in active regions.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If word line structures are placed deeper in isolation trenches to reduce leakage current, then leakage current decreases, but manufacturing precision requirements increase due to depth control constraints

Engineering Contradiction:
Improveleakage currentVSAvoiddepth control precision
Core Design Contradiction:
Object-generated harmful factorsVSManufacturing precision

Solution Approach 1:

The patent specifies that the first depth is equal to the second depth, establishing a precise parameter relationship between word line structures in different regions. This parameter control ensures that depth differences are minimized while still achieving leakage current reduction through the isolation trench configuration.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Isolation trenches serve as intermediary structures that contain first word line structures at controlled depths. These trenches act as mediators between the substrate and active areas, providing a controlled environment that reduces leakage current while maintaining manufacturable depth precision through the gate insulating layer, gate layer, and gate dielectric layer structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-generated harmful factors

If isolation trenches are made deeper to better isolate active areas, then leakage current reduction improves, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveleakage current path lengthVSAvoidisolation trench structure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The isolation trenches are configured with specific depth characteristics localized to isolation regions, while active areas maintain their own depth characteristics. This local optimization allows the isolation trenches to be sufficiently deep to reduce leakage current without requiring the entire device structure to be complex or difficult to manufacture.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The device is segmented into distinct regions: isolation trenches containing first word line structures at a first depth, and active areas containing second word line structures at a second depth. This segmentation allows independent optimization of each region's depth characteristics, reducing overall device complexity while achieving effective leakage current reduction.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4148791A1Semiconductor structure and manufacturing method therefor
Publication Date: 2023.03.15 CHANGXIN MEMORY TECH INC
  • EP4148791A1 patent drawingFigure 1
  • EP4148791A1 patent drawingFigure 2
  • EP4148791A1 patent drawingFigure 3a

AI summary

A semiconductor structure and a method for manufacturing the same. The semiconductor structure includes a substrate, in which isolation trenches are formed, which are configured to divide a part of the substrate into multiple active areas extending in a first direction; first word line structures, each in the isolation trench between two adjacent ones of the active areas in the first direction, and a bottom of the first word line structure being positioned at a first-set-depth position of the substrate; and second word line structures, each located in an active area, and a bottom of the second word line structure being positioned at a second-set-depth position of the substrate. A first depth corresponding to the first-set-depth position is larger than or equal to a second depth corresponding to the second-set-depth position, and the difference between the first depth and the second depth is smaller than a preset value.