Semiconductor Integrated Circuit Word Line Voltage Control

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Solution Overview

Problem

Semiconductor integrated circuits with flip-flop memory cells face challenges in achieving stable characteristics and performance due to variations in transistor characteristics and operating environments, particularly with reduced process rules and single power supply voltage constraints, which affect the static noise margin and power consumption.

Innovation Solution

The integration of pull-down circuits with transistors of the same conductivity type as the word line drivers allows for optimal control of word line voltages, reducing variations and improving static noise margin, even with changes in power supply voltage or temperature, while minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the process rule is reduced to reduce area and power supply voltage, then area and power consumption are reduced, but transistor threshold voltage variation increases and memory cell characteristics become unstable

Engineering Contradiction:
ImproveareaVSAvoidmemory cell characteristic stability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent changes the voltage parameter of the word line by introducing a pull-down circuit that actively controls the word line voltage to be lower than the power supply voltage. This parameter change compensates for the increased transistor threshold voltage variation caused by process rule reduction, thereby stabilizing memory cell characteristics while maintaining reduced area and power consumption.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the word line voltage is reduced to improve static noise margin, then data holding performance improves, but power consumption increases

Engineering Contradiction:
Improvestatic noise marginVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces a dynamic control mechanism where the pull-down circuit is activated only when needed to maintain proper word line voltage levels during specific operation phases. This dynamic approach allows the system to achieve improved static noise margin through reduced word line voltage while minimizing power consumption by not continuously maintaining the reduced voltage state.

Inventive Principle:
Principle #15Dynamics

3Reliability

If a step-up or step-down power supply circuit is added to control word line voltage, then static noise margin improves, but power consumption increases and layout area increases

Engineering Contradiction:
Improvestatic noise marginVSAvoidlayout area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the word line driver circuit and the pull-down circuit into an integrated configuration where both circuits share common components and control signals. This merging approach enables the system to achieve improved static noise margin through controlled word line voltage reduction while minimizing the increase in layout area by eliminating redundant circuit elements.

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If different power supply voltages are supplied to peripheral circuit and memory array, then static noise margin improves, but device complexity increases

Engineering Contradiction:
Improvestatic noise marginVSAvoidpower supply configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the power supply control into two parts: the main power supply voltage for the memory array and a locally controlled reduced voltage for the word line through the pull-down circuit. This segmentation allows the system to achieve improved static noise margin without requiring completely separate power supply systems, thereby reducing device complexity compared to fully independent power supplies for different circuits.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7643372B2Semiconductor integrated circuit
Publication Date: 2010.01.05 SOCIONEXT INC
  • US7643372B2 patent drawing
  • US7643372B2 patent drawing
  • US7643372B2 patent drawing

AI summary

A semiconductor integrated circuit includes a plurality of memory cells arranged in a matrix, a plurality of word lines corresponding to respective rows of the plurality of memory cells, a plurality of word line drivers for driving the plurality of word lines, respectively, and a plurality of pull-down circuits connected to the plurality of word lines, respectively, for causing voltages of the respective connected word lines to be lower than or equal to a power supply voltage when the respective word lines are in an active state. The word line drivers each have a transistor for causing the corresponding word line to go into the active state. The pull-down circuits each have a pull-down transistor for pulling down the corresponding word line, the pull-down transistor being a transistor having the same conductivity type as that of the transistor included the word line driver for driving the corresponding word line.