Semiconductor Write Leveling Training for Phase Alignment
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Solution Overview
Problem
Semiconductor systems face challenges in aligning internal data strobe signals with command pulses, leading to phase differences and increased power consumption due to inefficiencies in write leveling training operations.
Innovation Solution
A method involving external and internal write leveling training operations is performed, where the data strobe signal's delay period is controlled using latency and offset codes to generate transmission data, aligning the internal data strobe signal with the internal command pulse, thereby minimizing phase differences and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If write leveling training operation is performed without proper alignment control, then data transmission can be established, but phase differences between internal data strobe signal and command pulse increase leading to higher power consumption
Solution Approach 1:
The patent applies preliminary action by performing write leveling training operation before normal data transmission begins. During this training phase, the system pre-adjusts the delay period of the data strobe signal and pre-determines optimal latency codes and offset codes to align the internal data strobe signal with the command pulse. This preliminary alignment prevents phase differences and reduces power consumption during subsequent normal operation.
Solution Approach 2:
The patent employs parameter changes by dynamically adjusting the delay period of the data strobe signal through latency codes and offset codes. The system varies these timing parameters during the write leveling training operation to achieve optimal phase alignment between the internal data strobe signal and command pulse, thereby minimizing power consumption while maintaining accurate data transmission.
2Manufacturing precision
If delay period of data strobe signal is not controlled, then signal generation is simple, but phase alignment with command pulse deteriorates
Solution Approach 1:
The patent introduces intermediary elements in the form of latency codes and offset codes that mediate between the data strobe signal generation and the command pulse timing. These codes serve as controllable parameters that allow precise adjustment of the delay period, enabling accurate phase alignment without requiring complex direct timing control circuits. The latency codes and offset codes act as intermediaries that simplify the overall control architecture while achieving precise alignment.
3Productivity
If internal data strobe signal is not aligned with command pulse, then data transmission speed can be maintained, but power consumption increases due to inefficiencies
Solution Approach 1:
The patent implements feedback mechanisms during the write leveling training operation where the system monitors the transmission data and uses this information to adjust the delay period of the data strobe signal. The feedback from transmission data allows the system to determine optimal latency codes and offset codes, ensuring that the internal data strobe signal is properly aligned with the command pulse. This feedback-driven alignment optimizes both data transmission speed and power consumption by eliminating inefficiencies caused by phase misalignment.
Data Source
AI summary
A method includes performing a first write leveling training operation and performing a second write leveling training operation. The first write leveling training operation is performed to generate transmission data based on a data strobe signal and an internal command pulse and to generate a latency code. The second write leveling training operation is performed to generate the transmission data based on the data strobe signal and the internal command pulse.