Semiconductor Device Integration Density via Zigzag Pillar Arrangement
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Solution Overview
Problem
Current semiconductor devices face challenges in increasing integration density due to the limitations of two-dimensional memory cell arrangements, which require expensive processing equipment and have drawbacks in three-dimensional arrangements.
Innovation Solution
The semiconductor device design includes first and second select lines with vertical pillars and subsidiary lines arranged in a zigzag pattern, with specific insulation layers and pitch configurations to enhance integration density without the need for expensive equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional memory cell arrangements are used to increase integration, then manufacturing cost increases due to expensive processing equipment, but device complexity remains manageable
Solution Approach 1:
The patent transitions from two-dimensional planar memory cell arrangements to three-dimensional vertical pillar structures. Multiple vertical pillars are stacked in the vertical direction (third direction) while maintaining selective connectivity through subsidiary lines, enabling increased integration density without requiring expensive fine-pattern processing equipment for two-dimensional scaling
2Quantity of substance
If three-dimensional memory cell arrangements are formed to increase integration, then manufacturing complexity increases, but processing equipment costs are reduced
Solution Approach 1:
The three-dimensional structure is segmented into multiple vertical pillars (first, second, third, fourth vertical pillars) that can be formed through systematic stacking of insulating layers and conductive patterns. Each pillar is independently configurable with selective connectivity, allowing complex 3D arrangements to be built from simpler repeating units rather than requiring monolithic complex structures
Solution Approach 2:
Multiple insulating layers (first, second, third insulating layers) are nested sequentially in the vertical direction, with each layer containing conductive patterns that form part of the vertical pillar structure. This nested stacking approach builds three-dimensional complexity through layered assembly, reducing manufacturing complexity compared to forming complex 3D structures in a single process
3Quantity of substance
If vertical pillars are arranged in zigzag pattern with alternating subsidiary lines, then integration density increases, but pattern alignment precision requirements increase
Solution Approach 1:
The patent employs asymmetric zigzag arrangement of vertical pillars where first and second vertical pillars are positioned at different lateral locations relative to third and fourth vertical pillars. The subsidiary lines alternately connect different pairs of pillars (first subsidiary lines connect first and second pillars, second subsidiary lines connect third and fourth pillars), creating an asymmetric connectivity pattern that maximizes integration density while maintaining manufacturable alignment tolerances through systematic rather than random positioning
Data Source
AI summary
A semiconductor device includes first and second select lines, first and second vertical pillars, and first and second subsidiary lines. The select lines are spaced apart and include a first separating insulation layer therebetween. Each of the first and second vertical pillars is connected to a corresponding one of the first or second select lines. The first vertical pillars are closer to the first separating insulation layer. The second vertical pillars arranged in an oblique direction from the first vertical pillars. Each of the first subsidiary lines connects a pair of the first vertical pillars. Each of the second subsidiary lines connects a pair of the second vertical pillars adjacent. The first and second subsidiary lines are alternately disposed along a first direction, and ends of the first and second subsidiary lines are aligned along the first direction.