Semi-Damascene Wordline Formation with Protective Conductor Layer
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Solution Overview
Problem
Existing semiconductor fabrication methods struggle to maintain reliable wordline separation in small geometries, as prior art methods fail to effectively prevent the formation of undesired conducting paths known as stringers, which can lead to electrical defects and random single-bit errors in memory products.
Innovation Solution
A semiconductor structure is developed with a thin protective conductive layer and a storage layer above a substrate, where a bowl-shaped profile is created in the dielectric material to prevent stringer formation, and a sacrificed layer is used to ensure accurate wordline etching without polysilicon loss, using materials like polycrystalline silicon and silicon nitride, and employing etching techniques such as BDF and CMP to maintain critical dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching methods are used to create wordlines, then wordline formation is achieved, but stringers (undesired conducting paths) are formed due to residual conducting material
Solution Approach 1:
A thin protective conducting layer is deposited over the storage layer before wordline formation. This preliminary action ensures that the storage layer is protected during subsequent etching operations, and the protective layer serves as a sacrificial element that prevents stringer formation by controlling the etching process and providing a defined interface for material removal.
Solution Approach 2:
The thin protective conducting layer acts as an intermediary between the storage layer and the etching process. It mediates the interaction by providing a controlled interface that prevents direct contact between the etchant and the storage layer, thereby eliminating the formation of stringers while allowing precise wordline patterning.
2Quantity of substance
If wordline pitch is reduced below 40 nm to increase storage density, then device capacity increases, but maintaining electrical separation of wordlines becomes particularly difficult
Solution Approach 1:
The thin protective conducting layer provides localized protection precisely where needed - over the storage layer regions that require separation. This local quality approach allows the etching process to proceed with high precision at sub-40nm pitches, maintaining electrical separation only where critical while allowing other areas to be processed normally.
Solution Approach 2:
The invention changes the physical and chemical parameters of the etching process by introducing the protective conducting layer with specific material properties. This layer modifies the etching rate, selectivity, and profile control, enabling precise wordline formation at reduced pitches while maintaining separation. The protective layer's thickness and composition are optimized to achieve the required precision at sub-40nm dimensions.
3Ease of manufacture
If etching steps are performed to create wordlines, then conducting paths are formed, but residual conducting material remains creating undesired stringers
Solution Approach 1:
The thin protective conducting layer is designed as a sacrificial, disposable element. It is deposited to protect the storage layer during etching, then intentionally removed or consumed in the process. This sacrificial layer prevents polysilicon loss and stringer formation by providing a controlled interface that eliminates residual conducting material, accepting its own removal as the cost of achieving clean wordline formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach prevents the formation of stringers during wordline etching, maintains uniform cell critical dimensions, and minimizes polysilicon loss, thereby ensuring reliable wordline formation and reducing defects in semiconductor memory products, especially at pitches less than 40 nm.
Implementation Method 1
a thin protective conductive layer that protects the storage layer
Implementation Method 2
employing etching techniques such as BDF and CMP to maintain critical dimensions
Implementation Method 3
a bowl-shaped profile is created in the dielectric material to prevent stringer formation
Implementation Method 4
employing etching techniques such as BDF and CMP to maintain critical dimensions
Data Source
AI summary
A semi-damascene method is described for fabricating wordlines without stringers while maintaining critical cell dimensions when wordline pitch is less than 40 nm. A thin conducting layer protects a storage layer during manufacture, the thin conducting layer then making contact with filled-in conducting material.