Sense Amplifier Offset Voltage Control via Adaptive Current
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in reducing sense amplifier offset voltage without complicating design constraints, as previous methods either increase the offset voltage of low-offset sense amplifiers or require additional power supply terminals.
Innovation Solution
A semiconductor memory device with a control circuit that adjusts the current driving the sense amplifier based on the potentials of the data line pair after a specified period from the start of amplification, allowing for reduced offset voltage without needing additional power supply terminals or increasing circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the systematic offset of the sense amplifier is adjusted to be more negative than 0 mV to reduce offset voltage variation, then the offset voltage of sense amplifiers with low offset voltage increases, worsening the overall offset voltage reduction goal
Solution Approach 1:
The patent applies local quality by differentiating the offset adjustment approach based on the initial offset voltage characteristics of individual sense amplifiers. Instead of uniformly adjusting all sense amplifiers in the same direction, the system selectively applies positive or negative offset adjustments depending on whether the sense amplifier initially has low or high offset voltage, thereby optimizing the overall offset distribution without worsening individual cases
Solution Approach 2:
The patent changes the offset voltage parameter in opposite directions for different sense amplifiers based on their initial characteristics. By detecting the initial offset voltage level and subsequently applying compensating adjustments (positive adjustment for low-offset amplifiers, negative adjustment for high-offset amplifiers), the system achieves better overall offset voltage control and reduces the maximum offset voltage across all sense amplifiers
2Reliability
If additional power supply terminals are added to the sense amplifier to reduce offset voltage, then the offset voltage reduction capability is improved, but the device complexity and design constraints are worsened
Solution Approach 1:
The patent makes the existing power supply terminal serve multiple functions by applying both positive and negative offset adjustments through the same terminal. The control circuit selectively applies different adjustment polarities based on the sense amplifier's initial offset characteristics, eliminating the need for separate dedicated terminals for different adjustment types while achieving comprehensive offset control
Solution Approach 2:
The system uses the existing power supply infrastructure to provide offset adjustment functionality without requiring additional dedicated adjustment terminals. The control circuit intelligently manages the offset adjustment process by detecting initial offset conditions and applying appropriate compensating voltages through the available power supply terminal, making the system self-sufficient with existing resources
Data Source
AI summary
Provided is a semiconductor memory device including a plurality of memory cells arranged in a matrix, a plurality of word lines arranged corresponding to each row of the memory cells, a plurality of bit line pairs arranged corresponding to each column of the memory cells, a column selector that selects any of the plurality of bit line pairs based on a column selection signal and connects the selected bit line pair to a data line pair, a precharge circuit that precharges the data line pair, a sense amplifier that amplifies a potential difference of the data line pair, and a control circuit that controls current for driving the sense amplifier based on potentials of the data line pair after a lapse of a specified period from start of amplification of the potential difference of the precharged data line pair by the sense amplifier.