Self-Referenced Sense Amplifier Autonomous Pre-Charge Control
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Solution Overview
Problem
As semiconductor technology scales to submicron geometries, random device variation (RDV) increases, causing timing uncertainty and performance limitations in memory circuits due to the need for globally timed signals, which can result in idle sense amplifiers and over-bounding for timing uncertainty.
Innovation Solution
A self-referenced sense amplifier with autonomous pre-charge activation circuitry that calibrates individual pre-charge based on a trip-point, allowing each memory entry to start pre-charging independently during the evaluation phase without a global pre-charge signal, optimizing pre-charge and sense phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If globally timed sensing signals are used to control pre-charge phase, then all sense amplifiers have uniform pre-charge time, but timing uncertainty increases due to random device variation causing idle sense amplifiers
Solution Approach 1:
The patent divides the globally timed pre-charge control into individual sense amplifier-level control. Each sense amplifier has its own pre-charge control signal generated locally based on its own sensing completion status, rather than using a single global signal. This segmentation allows each sense amplifier to independently manage its pre-charge phase, eliminating idle time caused by waiting for the slowest sense amplifier to complete sensing.
Solution Approach 2:
The patent implements feedback mechanisms where the completion status of sensing in each sense amplifier is detected and used to control the pre-charge phase. The pre-charge control signal is generated based on feedback from the sensing operation status, allowing the system to adapt the pre-charge timing to actual sensing completion rather than using fixed global timing.
2Stability of the object's composition
If globally timed sensing signals are used, then pre-charge phase is synchronized across all sense amplifiers, but performance is limited by over-bounding for timing uncertainty
Solution Approach 1:
The patent transitions from static, fixed global timing to dynamic, adaptive timing for each sense amplifier. The pre-charge control signals are generated dynamically based on when each sense amplifier actually completes its sensing operation, allowing the system to adapt timing to actual conditions rather than predetermined schedules, thereby reducing cycle time without sacrificing reliability.
3Reliability
If larger data capture margins are used to account for timing uncertainty, then reliability improves, but performance decreases due to increased timing requirements
Solution Approach 1:
The patent initiates pre-charge action as soon as sensing is completed in each sense amplifier, rather than waiting for a global timing signal. This preliminary action allows the pre-charge phase to start immediately when needed, reducing the overall cycle time while maintaining adequate margins for data capture by ensuring each sense amplifier has sufficient time based on its own timing rather than a conservative global margin.
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to sensing circuit for a memory and methods of use. The memory includes a self-referenced sense amp that is structured to calibrate its individual pre-charge based on a trip-point, with autonomous pre-charge activation circuitry that starts pre-charging a sense-line on each unique entry as soon as a sense has been performed or completed.