Compact Sense Amplifier for Non-Volatile Memory Quick Pass Write

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current non-volatile memory devices face challenges with noise and interference among closely packed memory cells, limiting sensing accuracy and performance, particularly in high-density memory architectures.

Innovation Solution

A sense amplifier circuit with a latch circuit, bit line selection circuitry, and intermediate circuitry is introduced, allowing for selective connection and isolation of bit lines to improve sensing operations and reduce noise, enabling faster and more accurate data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are closely packed to increase density, then storage capacity increases, but noise and interference among cells increase, degrading sensing accuracy

Engineering Contradiction:
Improvestorage capacityVSAvoidsensing accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The sense amplifier circuit is segmented into distinct functional blocks: a latch circuit for data storage, bit line selection circuitry for targeted connection, and intermediate circuitry for controlled signal transfer. This segmentation isolates the sensing operation from noisy bit lines, maintaining accuracy in high-density configurations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Intermediate circuitry acts as a mediator between the latch circuit and bit lines, providing controlled connection and isolation. This intermediary structure allows selective coupling while blocking noise propagation, enabling accurate sensing despite close cell packing

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If conventional sense amplifier structures are used, then device simplicity is maintained, but sensing speed and accuracy are limited in high-density memory

Engineering Contradiction:
Improvecircuit structureVSAvoidsensing speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The circuit employs dynamic control of bit line connections through switches in the bit line selection circuitry. These switches dynamically connect or isolate bit lines based on operational requirements, enabling faster sensing by activating only necessary connections rather than maintaining static connections to all bit lines

Inventive Principle:
Principle #15Dynamics

3Device complexity

If all bit lines remain connected during sensing operations, then circuit simplicity is maintained, but noise and interference increase, reducing sensing accuracy

Engineering Contradiction:
Improvecircuit structureVSAvoidsensing accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

Instead of connecting all bit lines during sensing operations, the bit line selection circuitry activates only the specific bit line required for the current operation. This partial action reduces noise exposure while maintaining sufficient signal strength for accurate sensing

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8705293B2Compact sense amplifier for non-volatile memory suitable for quick pass write
Publication Date: 2014.04.22 SANDISK TECHNOLOGIES LLC
  • US8705293B2 patent drawing
  • US8705293B2 patent drawing
  • US8705293B2 patent drawing

AI summary

A compact and versatile sense amp is presented. Among its other features this sense amp arrangement provides a way to pre-charge bit lines while doing data scanning. Another feature is that the sense amp circuit can provide a way to set three different bit line levels used in the quick pass write (QPW) technique using dynamic latch, where quick pass write is a technique where cells along a given word line selected for programming can be enabled, inhibited, or partially inhibited for programming. Also, it can provide a convenient way to measure the cell current.