Sense Amplifier Calibration Circuit for Low Sensing Margin
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Solution Overview
Problem
Existing sense amplifiers suffer from insufficient sensing margin due to factors beyond device mismatch, leading to errors in data reading and writing, particularly in advanced manufacturing processes and new product architectures.
Innovation Solution
A sense amplifier structure with two independently controllable inverters, where the input and output ends of the first inverter are connected through a calibration transistor, allowing for shorting and utilization of the inverter's switching point to amplify sensed voltage, and an operation method involving pre-charging, calibration, charge sharing, and sense amplifying.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If offset-cancellation sense amplifiers are used to compensate for device mismatch, then sensing margin loss caused by device mismatch is reduced, but sensing margin loss from other factors increases proportionally
Solution Approach 1:
The sense amplifier is divided into two independently controllable inverters (first inverter and second inverter) instead of using a single conventional sense amplifier structure. This segmentation allows each inverter to be independently optimized and controlled, enabling the first inverter to compensate for device mismatch while the second inverter handles other sources of sensing margin loss, thereby resolving the contradiction between addressing device mismatch and adapting to advanced manufacturing processes where other factors become more significant.
2Reliability
If conventional sense amplifier structure is used, then device complexity is low, but sensing margin is insufficient leading to data errors
Solution Approach 1:
The sense amplifier employs dynamic control of the two inverters through independent control signals. The first inverter is activated during the sensing phase to compensate for device mismatch, while the second inverter is activated subsequently to amplify the sensed voltage. This dynamic operation allows the system to achieve high data accuracy through a controlled sequence of operations, making the increased structural complexity manageable and effective.
Solution Approach 2:
The first inverter performs a preliminary compensation action for device mismatch before the main sensing and amplification process. By pre-compensating for the device mismatch effect, the system prepares the signal in advance, reducing the burden on subsequent amplification stages and improving overall data accuracy without requiring excessive complexity in the main sensing path.
3Reliability
If sensing margin is increased through calibration operations, then data reading reliability improves, but operation time increases
Solution Approach 1:
The sense amplifier operates in periodic phases: pre-charging phase, sensing phase (with first inverter active), amplification phase (with second inverter active), and reset phase. This periodic operation allows calibration and compensation to be performed in specific time windows rather than continuously, improving data reading accuracy while managing the time overhead through structured periodic operation cycles.
Data Source
AI summary
The sense amplifier includes: a first transistor electrically connected between a first power supply node and a complementary readout bit line; a second transistor electrically connected between a second power supply node and a readout bit line; the third transistor electrically connected between the complementary readout bit line and a third power supply node; the fourth transistor electrically connected between the readout bit line and a fourth power supply node; and a first calibration transistor connected between the complementary readout bit line and the control end of the third transistor. The first power supply node and the second power supply node are connected to a first power supply voltage through different switch elements respectively; the third power supply node and the fourth power supply node are connected to a second power supply voltage through different switch elements respectively.


