Sense Amplifier Decoupling for Low Power Memory

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Solution Overview

Problem

Sense amplifiers in memory arrays face high power consumption due to continuous biasing from a global voltage supply, additional circuitry required for bitline precharging, and limited power supply rejection ratios, which hinder ultra-low power applications.

Innovation Solution

A sense amplifier design where the sensing circuit is decoupled from the voltage supply during the sense phase and powered by the bitline capacitance, with a local sense voltage generating circuit that depends on the voltage supply during precharge but becomes independent during the sense phase, reducing power consumption and improving power supply rejection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the sense amplifier is continuously biased from a global voltage supply, then the sense amplifier can operate continuously, but power consumption increases

Engineering Contradiction:
Improvecontinuous operation capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The sense amplifier is designed to operate in periodic cycles consisting of a precharge phase followed by a sense phase. During the precharge phase, the bitline is precharged to a predetermined voltage level. During the sense phase, the sense amplifier is enabled to compare the bitline voltage with a reference voltage. This periodic operation eliminates continuous biasing while ensuring the amplifier is ready to operate when needed, thereby reducing power consumption while maintaining operational reliability.

Inventive Principle:
Principle #19Periodic action

2Stability of the object's composition

If the bitline is precharged from a regulated supply VDDpre, then the bitline voltage is stable, but additional circuitry and current are required

Engineering Contradiction:
Improvebitline voltage stabilityVSAvoidadditional circuitry
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The precharge function is merged with the sense amplifier operation itself. The sense amplifier's internal circuitry performs both the precharging of the bitline and the subsequent sensing operation in a unified manner. This eliminates the need for separate precharge circuitry and regulated supplies, reducing device complexity while maintaining bitline voltage stability through the coordinated operation of the merged functions.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If voltage regulation is implemented for the bitline voltage or sense amplifier, then power supply rejection ratio improves, but power consumption increases

Engineering Contradiction:
Improvepower supply rejection ratioVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The sense amplifier circuit is designed to inherently reject power supply variations without requiring external voltage regulation circuitry. The circuit topology and timing are configured such that the sensing operation naturally compensates for supply voltage fluctuations, and the precharge phase prepares the bitline in a state that is resilient to subsequent voltage variations. This self-service approach achieves good power supply rejection ratio while avoiding the additional power consumption of regulation circuits.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design achieves lower power consumption and enhanced power supply rejection, enabling more efficient reading operations in memory arrays by reusing bitline charge and being resilient to voltage supply variations.

Implementation Method 1

the bitline is typically precharged from a regulated supply VDDpre, thereby requiring additional circuitry and current

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9460759B2Sense amplifier of a memory cell
Publication Date: 2016.10.04 INFINEON TECHNOLOGIES AG
  • US9460759B2 patent drawing
  • US9460759B2 patent drawing
  • US9460759B2 patent drawing

AI summary

A sense amplifier of a memory cell having a sense voltage generating circuit configured to generate a sense voltage; and a sensing circuit configured to compare a bitline voltage of the memory cell with the sense voltage, and to output a digital output signal indicating a content of the memory cell, wherein during a sense phase, the sensing circuit is decoupled from a voltage supply which charges a bitline capacitance during a precharge phase, and is coupled to and supplied by the bitline capacitance. The sense voltage generating circuit may be further configured to generate a sense voltage that during a precharge phase is dependent on the voltage supply and during a sense phase is independent of the voltage supply.