Sense Amplifier Common-Mode Compensation for DFE Tap Loading
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Solution Overview
Problem
The output common mode voltage drop due to decision feedback equalizer (DFE) taps in differential data signal receivers causes inter-symbol interference and reduces the ability of the comparator to accurately latch data, especially when the half-period of the clock is greater than the time interval where the output common mode voltage crosses into the linear region of the sense amplifier.
Innovation Solution
A compensation circuit is implemented to adjust the output common mode voltage by using a feedback mechanism that compares a reference and replica common mode voltage, adjusting the current sources to maintain the output common mode voltage at a level where the sense amplifier has sufficient gain for accurate data latching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If decision feedback equalizer (DFE) taps are used to reduce inter-symbol interference, then signal quality is improved, but output common mode voltage drops into the linear region causing loss of gain
Solution Approach 1:
The patent implements a feedback mechanism where the output common mode voltage is monitored and fed back to control current sources. This feedback loop detects when the voltage drops into the linear region and automatically adjusts the current to restore the voltage to the non-linear region, thereby maintaining amplifier gain while allowing DFE taps to function for signal quality improvement.
Solution Approach 2:
The patent dynamically changes the current parameter supplied to the current sources based on the output common mode voltage level. By adjusting this electrical parameter in response to voltage conditions, the system maintains the sense amplifier operating in the non-linear region where sufficient gain exists, preventing the degradation caused by DFE tap loading.
2Device complexity
If the output common mode voltage is allowed to drop naturally, then device complexity is reduced, but data latching accuracy deteriorates
Solution Approach 1:
A feedback circuit monitors the output common mode voltage and compares it against reference levels. When the voltage approaches the linear region threshold, the feedback mechanism activates to adjust current sources, thereby preventing voltage drop that would compromise comparator latching accuracy. This maintains precision without requiring overly complex circuit topologies.
Solution Approach 2:
The patent introduces current sources as intermediary elements between the DFE taps and the sense amplifier output. These current sources act as mediators that can be dynamically controlled to counteract the voltage droop effect of DFE taps, thereby protecting the comparator latching process from voltage excursions into the linear region.
3Power
If current sources are added to compensate for common mode voltage drop, then sense amplifier gain is maintained, but device complexity increases
Solution Approach 1:
The current sources in the patent serve multiple functions: they compensate for output common mode voltage droop, maintain sense amplifier gain, and work in conjunction with the feedback mechanism to automatically regulate operating conditions. This multi-functionality justifies their inclusion despite the added complexity, as they replace what would otherwise require more complex circuit topologies.
Solution Approach 2:
The feedback mechanism enables the system to self-regulate by automatically detecting when the output common mode voltage drops and activating the current sources to restore proper operating conditions. This self-service capability maintains amplifier gain without requiring external intervention or overly complex control circuits, as the system autonomously corrects its own operating parameters.
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3A~3B
AI summary
A receiver including a first differential sense amplifier configured to amplify an input differential data signal to generate an output differential data signal; a first set of one or more differential decision feedback equalizer (DFE) taps configured to modify the output differential data signal based on a set of one or more differential tap signals, wherein the first set of one or more differential DFE taps affect an output common mode voltage associated with the output differential data signal; and a compensation circuit configured to adjusts the output common mode voltage to compensate for the effect on the output common mode voltage by the set of one or more differential DFE taps. The compensation circuit includes reference and replica receivers to generate reference and replica output common mode voltages, and a feedback circuit to adjust the output common mode voltage based on the reference and replica output common mode voltages.