Sense Amplifier Circuit with Dual Current Paths and Capacitor
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Solution Overview
Problem
Existing sense amplifier circuits face challenges in accurately reading the storage states of resistive memory cells, particularly those with resistance margins less than 1K ohm, due to device mismatches and the need to limit current during read operations to avoid disturbing the memory cells, which requires distinguishing voltage differences of less than 10-20mV.
Innovation Solution
A sense amplifier circuit with two current paths, each containing a transistor configured as a current source, uses a capacitor to store a voltage difference between nodes during a first phase of a memory read operation and applies this voltage to control the conductivity of transistors in a second phase, adjusting the output node voltage to indicate the storage state, while limiting current to reduce read disturb and compensate for device mismatches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current is limited during read operations, then read disturb is reduced, but voltage differences to be distinguished become smaller (less than 10-20mV)
Solution Approach 1:
The read operation is divided into two distinct phases: a first phase where voltage differences are amplified and stored on the capacitor, and a second phase where the stored voltage is used to control transistor conductivity for enhanced detection. This temporal segmentation allows the circuit to achieve both low current operation and high voltage detection precision.
Solution Approach 2:
The capacitor stores the voltage difference between nodes during the first phase before the second phase begins. This preliminary action of capturing and preserving the voltage difference allows the circuit to work with amplified voltage signals in the second phase, improving detection precision without requiring high current during the critical detection phase.
2Measurement precision
If device mismatches are present, then accuracy of reading storage states deteriorates, but adding compensation circuitry increases complexity
Solution Approach 1:
The voltage stored on the capacitor during the first phase serves as a feedback mechanism that compensates for device mismatches. By capturing the actual voltage difference that includes mismatch effects and then using this stored voltage to control transistor conductivity in the second phase, the circuit inherently compensates for mismatches without requiring separate compensation circuitry.
3Use of energy by moving object
If power consumption is reduced, then energy efficiency improves, but read operation speed may slow down
Solution Approach 1:
The read operation uses periodic action by dividing it into distinct phases (first phase for voltage amplification and storage, second phase for detection). This allows the circuit to concentrate energy during specific phases rather than continuously, improving power efficiency while maintaining speed through the structured temporal sequence of operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances read margins at lower power consumption and speeds up the read operation, effectively addressing the limitations of existing technologies by improving the accuracy and reliability of reading resistive memory cells with minimal disturbance.
Implementation Method 1
A sense amplifier circuit includes two current paths... a capacitor that during a first phase of a memory read operation, is coupled between two corresponding nodes of the two paths to store a voltage difference between the two nodes
Implementation Method 2
the capacitor is coupled to the control terminal of one of the second transistors to control the conductivity of the transistor
Data Source
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AI summary
In one embodiment, a sense amplifier circuit includes two current paths. Each path includes a transistor configured as a current source during a memory read operation and a second transistor. During the first phase of a memory read operation, the first current path is coupled to one cell and the second current path is coupled to a second cell. The sense amplifier circuit includes a capacitor that during a first phase of a memory read operation, is coupled between two corresponding nodes of the two paths to store a voltage difference between the two nodes. During the second phase, the cell/current path couplings are swapped and the capacitor is coupled to the control terminal of one of the second transistors to control the conductivity of the transistor for adjusting a voltage of an output node to indicate the value of the data being read.