Sense Amplifier Transistor Threshold Compensation
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Solution Overview
Problem
Sense amplifiers in SRAMs face challenges in minimizing input offset voltage (IOV) due to transistor mismatch, especially in deep sub-micro CMOS processes, which affects read access time and requires additional chip area or operational complexity for offset trimming/calibration.
Innovation Solution
A compensation stage with capacitors and transistors is introduced to poise the source voltages of n-channel MOSFETs, reducing IOV by storing and nulling offset voltage levels, thereby compensating for transistor mismatch and improving read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistors are upsized to reduce IOV, then IOV is reduced, but chip area increases
Solution Approach 1:
The sense amplifier is divided into two functional stages: an input stage that senses the voltage differential and a compensation stage that reduces IOV. This segmentation allows the input stage transistors to remain small for high density while the compensation stage handles the IOV reduction, resolving the contradiction between small transistor size and low IOV.
Solution Approach 2:
A compensation stage is introduced as an intermediary between the input stage and the rest of the sense amplifier circuit. This intermediate stage processes the signal to reduce IOV without requiring the input stage transistors to be larger, thus maintaining high bit density while achieving low IOV.
2Measurement precision
If offset trimming or calibration is added, then IOV is reduced, but operational complexity increases
Solution Approach 1:
The compensation stage automatically compensates for IOV through its inherent circuit operation without requiring external trimming or calibration procedures. The circuit self-adjusts to minimize IOV, eliminating the need for additional operational complexity associated with offset trimming or calibration mechanisms.
3Quantity of substance
If transistors are made smaller for high density, then bit density increases, but IOV increases due to transistor mismatch
Solution Approach 1:
The sense amplifier is segmented into an input stage for sensing and a compensation stage for IOV reduction. This allows the input stage to use small transistors for high bit density while the compensation stage specifically addresses the IOV issue caused by transistor mismatch, resolving the contradiction between density and precision.
Solution Approach 2:
The compensation stage serves as an intermediary that processes the signal from the small transistors in the input stage, reducing the IOV introduced by transistor mismatch. This intermediary stage enables the use of small transistors for high density while maintaining low IOV through active compensation.
Data Source
AI summary
One embodiment provides, in a sense amplifier for an electronic memory array in which a selected memory cell drives a developing voltage differential according to a logic state of the memory cell, a method to store the logic state. The method includes poising source voltages of first and second transistors at levels offset, respectively, by threshold voltages of the first and second transistors. The method also includes applying the voltage differential between a gate of the first transistor and a gate of the second transistor, the first and second transistors configured to oppose each other in a cross-coupled inverter stage of the sense amplifier.