Semiconductor Memory Sense Amplifier Leakage Reduction
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Solution Overview
Problem
Existing bit line sense amplifiers in semiconductor memory apparatuses face limitations in reducing threshold voltage due to high leakage currents, which deteriorate low voltage characteristics and restrict further reduction of threshold voltage.
Innovation Solution
Incorporating a second sense amplification unit with NMOS transistors having a lower threshold voltage and a voltage passing section, controlled by a switching signal, to minimize leakage current during standby and optimize data sensing operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the threshold voltage of MOS transistors in the bit line sense amplifier is reduced to improve low voltage characteristics, then the low voltage characteristic is improved, but the leakage current increases
Solution Approach 1:
The sense amplifier is divided into two separate sense amplification units: a first sense amplification unit with higher threshold voltage transistors and a second sense amplification unit with lower threshold voltage transistors. This segmentation allows each unit to serve different functions - the first unit provides stable operation with low leakage, while the second unit enables improved low voltage characteristics, thus resolving the contradiction between low voltage performance and leakage current.
Solution Approach 2:
The patent dynamically switches between the first and second sense amplification units based on operating conditions. A control unit activates the second sense amplification unit when low voltage operation is required, and switches to the first unit when leakage current needs to be minimized. This dynamic switching allows the system to adapt to different operational requirements and resolve the threshold voltage-leakage current tradeoff.
2Speed
If the threshold voltage is reduced to enable faster sensing operations, then the sensing speed is improved, but the leakage current increases
Solution Approach 1:
By segmenting the sense amplifier into two units with different transistor threshold voltages, the patent enables the second unit (with lower threshold voltage) to handle high-speed sensing operations when needed, while the first unit (with higher threshold voltage) handles operations where leakage current must be minimized. This segmentation resolves the contradiction between sensing speed and leakage current.
Solution Approach 2:
The control unit dynamically selects which sense amplification unit to activate based on the required sensing speed and operational conditions. When fast sensing is required, the second unit with lower threshold voltage transistors is activated. When leakage current needs to be minimized, the first unit is activated. This dynamic selection resolves the speed-leakage current contradiction.
3Adaptability or versatility
If a single sense amplification unit is used, then the device complexity is low, but the versatility in handling different voltage conditions is limited
Solution Approach 1:
The sense amplifier is segmented into two specialized units, each optimized for different voltage conditions. The first unit uses higher threshold voltage transistors for stable operation at higher voltages, while the second unit uses lower threshold voltage transistors for improved performance at lower voltages. This segmentation increases adaptability to different voltage conditions while maintaining manageable complexity through modular design.
Solution Approach 2:
The sense amplifier structure achieves multi-functionality by incorporating two sense amplification units that can handle different voltage conditions and operational requirements. The control unit manages the switching between units, allowing a single sense amplifier circuit to universally handle both high-voltage stable operation and low-voltage high-performance operation, thus improving versatility without excessive complexity.
Data Source
AI summary
A semiconductor memory apparatus includes: a first sense amplification unit including first and second inverters configured to be driven to voltage levels of a power driving signal and a ground driving signal and forming a latch structure between a bit line and a bit line bar; and a second sense amplification unit including first and second transistors configured to be driven to the voltage level of the ground driving signal and forming a latch structure between the bit line and the bit line bar when an activated switching signal is applied, wherein a threshold voltage of the second sense amplification unit is set lower than that of the first sense amplification unit.


