Sense Amplifier Level Shifting Across Different Power Domains
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Solution Overview
Problem
Computing devices with multiple power domains face issues with short-circuit currents when signals from one power domain are directly provided to another with a different supply voltage level, leading to increased power consumption and potential circuit malfunctions.
Innovation Solution
A level shifter is used to shift the voltage level of signals from a sense amplifier in one power domain to another, utilizing a pair of transistors to generate a level shifted differential output signal that can be stored in a latch in the second power domain, thereby eliminating short-circuit currents and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a signal from a first power domain is directly provided to circuitry in a second power domain with a different supply voltage level, then the signal transmission is simple and direct, but short-circuit current occurs leading to increased power consumption and potential circuit malfunctions
Solution Approach 1:
A level shifter circuit is introduced as an intermediary component between the first power domain (with first supply voltage level) and the second power domain (with second supply voltage level). The level shifter receives the differential output signal from the sense amplifier in the first power domain, shifts its voltage level, and provides the level-shifted signal to the latch in the second power domain. This intermediary structure prevents direct connection between different voltage domains, thereby eliminating short-circuit current while maintaining efficient signal transmission.
2Reliability
If a level shifter is used to shift voltage levels between power domains, then short-circuit currents are eliminated and power consumption is reduced, but the device complexity increases
Solution Approach 1:
The level shifter circuit is segmented into distinct functional blocks: a first pair of transistors (first and second transistors) that receive the differential output signal from the sense amplifier, and a second pair of transistors (third and fourth transistors) that generate the level-shifted differential output signal. This segmentation allows each transistor pair to perform a specific voltage shifting function, improving circuit stability while keeping the overall structure modular and manageable.
Solution Approach 2:
The level shifter circuit serves multiple functions simultaneously: it shifts voltage levels from the first power domain to the second power domain, eliminates short-circuit currents between different voltage domains, and provides a buffered differential signal to the latch. By integrating these functions into a single circuit block, the design achieves high reliability without proportionally increasing complexity.
3Reliability
If a level shifter with multiple transistors is used to generate level shifted differential output signal, then voltage level shifting is achieved, but the timing penalties in the signal path increase
Solution Approach 1:
The level shifter uses different transistor pairs for different stages of voltage shifting. The first pair of transistors (first and second transistors) is optimized for receiving the differential output signal from the sense amplifier at the first voltage level, while the second pair of transistors (third and fourth transistors) is optimized for generating the level-shifted signal at the second voltage level. This localized optimization allows each transistor pair to operate efficiently at its specific voltage level, minimizing signal delay while achieving reliable voltage level compatibility.
Data Source
AI summary
An apparatus includes a sense amplifier that has a sense amplifier differential output. The sense amplifier may be in a first power domain. The apparatus may include level shifting circuitry that has a level shifter differential output. The level shifting circuitry may be coupled to the sense amplifier differential output. The level shifting circuitry may include a first transistor and a second transistor. A first sense amplifier output of the sense amplifier differential output may be coupled to the first transistor, and a second sense amplifier output of the sense amplifier differential output may be coupled to the second transistor. The apparatus may further include a latch to store data. The latch may be coupled to the level shifter differential output. The latch is in a second power domain that is different from the first power domain.