Sense Amplifier Bias Control for Constant Loop Gain
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Solution Overview
Problem
Current mode sense amplifiers in integrated circuits face challenges in maintaining constant loop gain across variations in process, voltage, and temperature, especially in low voltage, low power systems, leading to undesirable changes in operating characteristics.
Innovation Solution
A bias circuit with a beta multiplier reference (BMR) is used to generate a bias voltage that adjusts to maintain a constant loop gain for the sense amplifier, independent of process, voltage, and temperature variations, by scaling transistors and resistances to ensure the loop gain remains stable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If diode coupled NMOS transistors are used to provide load with 1/gm, then loop gain remains substantially constant despite PVT variations, but supply voltage must be greater than sum of threshold voltages plus voltage margin which is not desirable in low voltage systems
Solution Approach 1:
The patent changes the load configuration from diode-coupled NMOS transistors to PMOS transistors operating in linear region, altering the electrical parameters to reduce voltage requirements while maintaining loop gain stability through careful transistor sizing and biasing arrangements
Solution Approach 2:
The patent introduces a current mirror circuit as an intermediary element to couple the PMOS load transistors to the differential pair, enabling voltage reduction while preserving the feedback mechanism needed for stable loop gain
2Use of energy by moving object
If PMOS transistors are used to provide load R instead of diode coupled NMOS transistors, then supply voltage requirement is reduced, but loop gain varies more with PVT variations
Solution Approach 1:
The patent implements a feedback mechanism using a current mirror that senses the differential pair current and adjusts the PMOS load current accordingly, creating a feedback loop that compensates for PVT variations and stabilizes the loop gain despite using PMOS transistors
Solution Approach 2:
The patent makes the load current dynamic by using a current mirror that automatically adjusts the PMOS load transistor currents based on the differential pair operating conditions, allowing the system to adapt to PVT variations and maintain stable loop gain
Data Source
AI summary
Memories, sense amplifiers, and methods for amplifying a current input are disclosed, including a sense amplifier including a bias circuit configured to provide a bias voltage having a magnitude responsive to maintaining a substantially constant loop gain, and further including an amplifier stage coupled to the bias circuit to receive the bias voltage and configured to amplify a input current at an input-output node, a loop gain of the current amplifier stage is controlled at least in part to the bias voltage.