Sense Amplifier Circuit for Nonvolatile Memory Low Current Sensing
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Solution Overview
Problem
Conventional sense amplifier circuits for nonvolatile memory struggle to operate effectively when the current flowing in memory cells is low, limiting their ability to accurately read data, especially as the size of memory cells increases and current flow diminishes.
Innovation Solution
A sense amplifier circuit design that includes a first current amplifier, a second current amplifier, a current mirror, and an optional inverter, utilizing MOS transistors to amplify signals and sense currents on the bit line, enabling operation even when the source voltage is applied to the memory cell and allowing data reading with low current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell size is increased to improve integration capacity, then storage density is improved, but current flow intensity deteriorates
Solution Approach 1:
The sense amplifier circuit is divided into multiple functional blocks: first current amplifier (PM11, NM11), second current amplifier (PM12, NM12), and inverter (INV0). Each block processes the weak current signal from different aspects, with the first amplifier handling initial amplification and the second amplifier providing additional gain, enabling reliable detection of low current flows from scaled-down memory cells
Solution Approach 2:
The patent combines PMOS and NMOS transistors in a complementary configuration within the sense amplifier circuit. The PMOS transistors (PM11, PM12) and NMOS transistors (NM11, NM12) work together to amplify the weak current signal from the memory cell, providing both current amplification and voltage amplification capabilities to handle low current flow conditions
2Device complexity
If conventional sense amplifier circuit is used, then circuit simplicity is maintained, but reading capability deteriorates when current flow is low
Solution Approach 1:
The sense amplifier circuit uses dynamic control signals (sensing enable signal SAENb, bit line signal BL) to switch between different operational states. The circuit transitions from a high-impedance state during normal operation to an active amplification state during sensing, enabling the circuit to adapt to different operational requirements while maintaining reliability in low current conditions
Solution Approach 2:
The patent changes the operational parameters of the transistors during sensing operation. When the sensing enable signal is activated, the PMOS and NMOS transistors switch their operating states, changing their conductance parameters to enable strong current amplification. The circuit adjusts its electrical parameters dynamically to optimize performance for low current detection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed circuit ensures reliable data reading and sensing of memory cells, even when the current is low, by effectively amplifying signals and sensing currents, thus overcoming the limitations of conventional designs.
Implementation Method 1
a first current amplifier comprising a first type MOS transistor, a second current amplifier comprising a second type MOS transistor, and a current mirror comprising a plurality of the second type MOS transistors
Data Source
AI summary
A sense amplifier circuit for a nonvolatile memory that includes a first amplifier to perform a switching operation to output a first signal on a sense amplifier based logic (SABL) node depending on the state of a sensing enable signal, a second amplifier to perform a switching operation to output a second signal on the SABL node depending on the state of the sensing enable signal, a current mirror that sinks current on the SABL node depending on the sensing enable signal and a bit line signal, and an inverter arranged to output the signal on the SABL node as a data signal.