Memory Sense Amplifier Logic for In-Array Boolean Operations

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Solution Overview

Problem

Existing memory systems face inefficiencies in performing logical operations due to the need for additional latches and multiple data transfers, which increase processing time and power consumption, especially in volatile memory technologies like DRAM where data is destroyed during read operations.

Innovation Solution

The implementation of a logical operation component within the sensing circuitry of a memory array, allowing for direct logical operations between data stored in memory cells without the need for additional latches, and enabling operations like XOR, NOR, and NAND using sense amplifiers with different reference voltages, thereby reducing the need for external processing resources and data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If data is read from memory cells using conventional sense amplifiers, then data can be sensed, but the read operation destroys the stored data in volatile memory

Engineering Contradiction:
Improvedata sensing capabilityVSAvoiddata destruction during read
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The sense amplifier is divided into two separate sense amplifiers (first and second sense amplifiers) that operate in parallel. Each sense amplifier reads data from different memory cells independently, allowing the system to sense multiple bits simultaneously while preserving the original data through selective reading and logical operation execution within the memory array.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If additional latches are used to perform logical operations outside the memory array, then logical operations can be executed, but processing time and data transfer requirements increase

Engineering Contradiction:
Improvelogical operation capabilityVSAvoidprocessing time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The logical operation component is merged directly into the sensing circuitry within the memory array, combining data sensing and logical operation execution into a single integrated structure. This eliminates the need for separate latches and external processing, allowing logical operations to be performed in-place on sensed data without additional data transfer cycles or latency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sensing circuitry is designed to perform multiple functions: data sensing, data storage during operation, and logical operation execution. The sense amplifiers and logical operation component work together as a universal processing unit that can handle various logical operations (AND, OR, XOR, etc.) directly on memory data, eliminating the need for dedicated external processing resources.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If data is transferred between memory array and external processing resources, then logical operations can be performed, but power consumption increases

Engineering Contradiction:
Improveprocessing capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The memory array performs logical operations on its own stored data using integrated sensing circuitry and logical operation components, without requiring external processing resources. Data remains within the memory array throughout the entire process, and the sensing circuitry uses the data already present in memory cells to execute logical operations, eliminating energy-consuming data transfer to and from external processors.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11508431B2Logical operations using a logical operation component
Publication Date: 2022.11.22 MICRON TECHNOLOGY INC
  • US11508431B2 patent drawing
  • US11508431B2 patent drawing
  • US11508431B2 patent drawing

AI summary

An example apparatus comprises an array of memory cells coupled to sensing circuitry including a first sense amplifier, a second sense amplifier, and a logical operation component. The sensing circuitry may be controlled to sense, via first sense amplifier, a data value stored in a first memory cell of the array, sense, via a second sense amplifier, a data value stored in a second memory cell of the array, and operate the logical operation component to output a logical operation result based on the data value stored in the first sense amplifier and the data value stored in the second sense amplifier.