Sense Amplifier Sharing via MOSFET Gate Coupling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In memory designs, sharing a sense amplifier between multiple banks of data storage cells increases capacitive load and power consumption due to the use of additional multiplex circuits, leading to inefficient area usage and power management.
Innovation Solution
A circuit and method where a sense amplifier is shared between multiple banks by coupling data lines from different banks to the gate terminals of MOSFETs, reducing the need for additional multiplex circuits and minimizing capacitive load, thereby optimizing area usage and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a sense amplifier is shared between multiple banks using additional multiplex circuits, then the sense amplifier can serve more banks, but capacitive load and power consumption increase
Solution Approach 1:
The sense amplifier is designed to directly accept data lines from multiple different banks through its MOSFET gate terminals, enabling a single amplifier to serve multiple banks without requiring additional multiplexing circuits. This multi-functionality approach allows the same amplifier circuitry to handle signals from different memory banks simultaneously or sequentially.
Solution Approach 2:
The patent removes the intermediate multiplexing circuitry that would normally be required to share a sense amplifier between multiple banks. By directly coupling the data lines from different banks to the MOSFET gate terminals, the solution extracts and eliminates the harmful multiplex circuits, thereby reducing capacitive load and power consumption while maintaining the sharing capability.
2Adaptability or versatility
If additional multiplex circuits are used to share a sense amplifier, then multiple banks can access the amplifier, but silicon area usage increases
Solution Approach 1:
The sense amplifier is designed to directly accept data lines from multiple different banks through its MOSFET gate terminals, enabling a single amplifier to serve multiple banks without requiring additional multiplexing circuits. This multi-functionality approach allows the same amplifier circuitry to handle signals from different memory banks simultaneously or sequentially.
Solution Approach 2:
The patent removes the intermediate multiplexing circuitry that would normally be required to share a sense amplifier between multiple banks. By directly coupling the data lines from different banks to the MOSFET gate terminals, the solution extracts and eliminates the harmful multiplex circuits, thereby reducing capacitive load and power consumption.
3Adaptability or versatility
If additional multiplex circuits are used to share a sense amplifier, then multiple banks can access the amplifier, but capacitive load increases
Solution Approach 1:
The sense amplifier is designed to directly accept data lines from multiple different banks through its MOSFET gate terminals, enabling a single amplifier to serve multiple banks without requiring additional multiplexing circuits. This multi-functionality approach allows the same amplifier circuitry to handle signals from different memory banks simultaneously or sequentially.
Solution Approach 2:
The patent removes the intermediate multiplexing circuitry that would normally be required to share a sense amplifier between multiple banks. By directly coupling the data lines from different banks to the MOSFET gate terminals, the solution extracts and eliminates the harmful multiplex circuits, thereby reducing capacitive load and power consumption.
Data Source
AI summary
A first plurality of storage cells may be coupled to a first pair of data lines, and a second plurality of storage cells may be coupled to a second pair of data lines. Each storage cell in the first plurality of storage cells may be configured to generate a first output signal on the first pair of data lines in response to an assertion of a respective one of first plurality of selection signals, and each storage cell in the second plurality of storage cells may be configured to generate a second output signal on the second pair of data lines in response to the assertion of a respective one of a second plurality of selection signals. Circuitry may assert a given selection signal from either the first or second plurality of selection signals. An amplifier circuit may amplify either the first or second output signal.