Bit Line Sense Amplifier for Multi-Bit Data Sensing
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Solution Overview
Problem
Current semiconductor memory devices face challenges in accurately sensing and restoring multi-bit data in DRAM cells due to sensitivity to noise and offset in open bit line structures, requiring high-reliability sensing and restoring operations.
Innovation Solution
A bit line sense amplifier with a first and second latch, connected through switches, senses and transmits multi-bit data in an open bit line structure, using different delta voltages to ensure reliable sensing and restoration of charges corresponding to multi-bit data in DRAM cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a sense amplifier in an open bit line structure is used to sense multi-bit data, then the capacity of the memory device is increased, but the amplifier becomes sensitive to noise and offset
Solution Approach 1:
The sense amplifier is divided into two separate latches: a first latch connected to the bit line and a second latch connected to the complementary bit line. Each latch independently senses one bit of multi-bit data, thereby segmenting the sensing function to reduce noise and offset sensitivity while maintaining high data capacity
Solution Approach 2:
Two latches act as intermediary elements between the open bit line structure and the output, enabling reliable sensing of multi-bit data by isolating the sensing function from the noisy open bit line environment
2Quantity of substance
If multi-bit data is stored in one DRAM cell, then the memory capacity is increased, but accurate control of the sense amplifier function becomes more difficult
Solution Approach 1:
The sense amplifier function is segmented into two latches, where the first latch senses the first bit and the second latch senses the second bit. This segmentation simplifies the control complexity by assigning each latch a specific sensing task, making multi-bit data sensing more manageable
Solution Approach 2:
Each latch is designed to perform multiple functions: sensing data from the bit line, storing the sensed data, and providing the sensed data as input to the other latch. This multi-functionality reduces the overall system complexity while enabling multi-bit data storage
Data Source
AI summary
A semiconductor memory device includes a memory cell that stores multi-bit data, and a bit line sense amplifier that is connected to a bit line of the memory cell and a complementary bit line corresponding to the memory cell in an open bit line structure. The bit line sense amplifier includes a first latch that sequentially senses a first bit and a second bit of the stored multi-bit data and transmits the sensed first bit to a second latch, and a second latch that senses the transmitted bit from the first latch.