Sense Amplifier Multi-Level Verify via Single Capacitor Discharge
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Solution Overview
Problem
The speed of programming operations in non-volatile memory devices, particularly in multi-level cell (MLC) formats, is limited by the time required for inter-pulse verify operations, which can be slow due to the need for multiple sensing operations and the standard practice of pre-charging and discharging a capacitor for each verify level.
Innovation Solution
Implementing a technique that allows for verifying multiple levels using a single pre-charge and discharge of the sensing capacitor, with different voltage levels applied to the second plate to distinguish between memory cells, and accelerating the programming process for the highest data state by increasing the programming pulse step size after the next-to-highest state completes, while inhibiting or fully applying the accelerated pulse to memory cells based on their conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple sensing operations and verify levels are used for programming multi-level cell memory, then measurement precision is improved, but productivity deteriorates due to the time-consuming nature of multiple inter-pulse verify operations
Solution Approach 1:
The sense amplifier is pre-charged to a voltage level that corresponds to a specific verify threshold before the programming pulse is applied. This preliminary setup allows the sense amplifier to be ready to verify multiple levels without requiring separate pre-charge operations for each verify level, thus maintaining measurement precision while improving programming speed.
Solution Approach 2:
The sense amplifier remains in a ready state during the programming pulse application, continuously monitoring the memory cell state. By maintaining the sense amplifier's charge and readiness throughout the programming process, the system eliminates idle time between verify operations, enabling continuous verification across multiple levels without sacrificing accuracy.
2Reliability
If multiple programming loops are used to ensure proper programming of all data states, then reliability is improved, but time consumption increases
Solution Approach 1:
The sense amplifier is pre-configured with a charge level corresponding to a higher verify threshold before programming begins. This preliminary configuration allows the system to verify multiple data states in a single programming loop, reducing the number of loops needed while maintaining reliability through comprehensive verification.
Solution Approach 2:
The sense amplifier is charged to a voltage level that exceeds the minimum required for the lowest verify threshold, enabling it to verify multiple higher thresholds simultaneously. This excessive charging approach allows a single programming loop to accomplish what would traditionally require multiple loops, reducing time loss while ensuring all necessary verify levels are checked.
3Measurement precision
If the sense amplifier is re-pre-charged for each verify level, then measurement precision is maintained, but device complexity increases due to additional control operations
Solution Approach 1:
The sense amplifier is designed to function universally across multiple verify levels by maintaining a single charge state that enables verification of all levels. This multi-functional approach eliminates the need for separate pre-charge circuits or control logic for each verify level, reducing device complexity while preserving measurement precision through the amplifier's ability to detect multiple threshold levels from its initial charge state.
Data Source
AI summary
To improve programming performance for a non-volatile memory , the verification of multiple programming levels can be performed based on a single discharge of a sensing capacitor through a selected memory cell by using different voltage levels on a second plate of the sensing capacitor: after discharging a first plate of the sensing capacitor through the selected memory cell, a result amount of charge is trapped on the first plate, which is then used to set first and second control gate voltages on a sensing transistor whose control gate is connected to the first place of the sensing capacitor based on respectively setting the second plate of the sensing capacitor to first and second voltage levels. To further improve programming performance, when the non-volatile memory stores in a multistate format, after the next to highest data state finishes programming, the next programming pulse can use a larger step size.