Sense Amplifier Negative Tail Voltage for SRAM Speed
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Solution Overview
Problem
Sense amplifiers in SRAM chips face limitations in driving capability and speed, particularly due to the small potential difference between complementary signals, which hinders their ability to meet the requirements of modern communication and high-performance computing technologies.
Innovation Solution
A sense amplifier configuration comprising specific transistors and a bootstrap circuit that connects the source of the tail current transistor to a negative level, enhancing the discharge path and reducing the time interval for establishing stable output, thereby accelerating sensing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the sense amplifier uses a conventional configuration with small potential difference between complementary signals, then the circuit complexity is reduced, but the sensing speed is limited
Solution Approach 1:
The patent introduces a negative voltage level dimension by connecting the source of the tail current transistor to a negative voltage level instead of ground. This dimensional change in voltage reference creates a larger voltage swing range, enabling faster sensing speed while maintaining the basic differential amplifier structure.
Solution Approach 2:
The patent changes the voltage parameter by applying a negative voltage level to the source of the tail current transistor. This parameter change increases the voltage difference across the transistor, enhancing the discharge current and thereby increasing the sensing speed without fundamentally changing the circuit topology.
2Power
If the sense amplifier uses a conventional configuration, then the driving capability is limited, but the manufacturing precision requirements are reduced
Solution Approach 1:
By changing the voltage parameter to a negative level at the tail current transistor source, the patent increases the voltage swing and discharge current, thereby enhancing the driving capability of the sense amplifier while maintaining the same transistor matching requirements as conventional designs.
Solution Approach 2:
The introduction of a negative voltage dimension expands the operating voltage range of the sense amplifier. This allows the amplifier to achieve higher driving capability through increased voltage swing without requiring tighter transistor matching, as the enhanced voltage headroom compensates for process variations.
3Loss of time
If the sense amplifier uses a conventional configuration, then the time interval for establishing stable output is reduced, but the sensing speed is limited
Solution Approach 1:
The patent applies a negative voltage parameter change to the tail current transistor source, which increases the discharge current and accelerates the rate at which the output reaches stability. This parameter change reduces the time interval for establishing stable output and simultaneously increases the overall sensing speed.
Data Source
AI summary
Embodiments of the invention provide a sense amplifier, a SRAM chip comprising the sense amplifier and a method for conducting read operation on a SRAM cell. The sense amplifier according to an embodiment of the invention comprises a cross coupling circuit, a tail current transistor and an output stage, wherein source of the tail current transistor is connected to a negative level. With the scheme according to embodiments of the invention, speed of the sense amplifier can be enhanced, thereby increasing read speed of the SRAM chip.