Compact Sense Amplifier for Non-Volatile Memory
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Solution Overview
Problem
Current non-volatile memory technologies face challenges in achieving high capacity and performance due to noise and interference among closely packed memory cells, which limit sensing accuracy and overall performance.
Innovation Solution
The development of a sense amplifier circuit with specific latch and intermediate circuit configurations that allow for pre-charging of bit lines and dynamic latch operations, enabling improved data transfer and measurement of cell currents while reducing noise and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are closely packed to increase capacity, then storage density is improved, but noise and interference among cells increases, degrading sensing accuracy
Solution Approach 1:
The patent introduces a sense amplifier as an intermediary device between the memory cell array and the read/write circuits. This sense amplifier includes a latch circuit that isolates and conditions the weak signals from closely packed memory cells, preventing noise propagation and maintaining sensing accuracy despite high cell density.
Solution Approach 2:
The sense amplifier circuit performs self-regulation through its latch mechanism, which automatically detects and amplifies the differential signals from memory cells. The circuit compensates for noise and interference through its inherent regenerative feedback mechanism, enabling accurate reading without external intervention.
2Speed
If sensing speed is increased to improve performance, then data transfer rate is improved, but noise and interference increases, reducing measurement accuracy
Solution Approach 1:
The sense amplifier operates using periodic clock signals to control the latch circuit. The latch is enabled during specific time windows to capture memory cell signals, then disabled to perform amplification and data output. This periodic operation allows high-speed sequential sensing while maintaining accuracy through controlled signal capture and processing phases.
Solution Approach 2:
The sense amplifier performs preliminary signal conditioning and amplification immediately after signal capture from memory cells. The latch circuit prepares the signal by holding it stable during the amplification process, ensuring that high-speed operation does not compromise the accuracy of the measured signal before it is transferred to the read/write circuit.
3Productivity
If latch circuits are added to improve data transfer, then productivity is improved, but device complexity increases
Solution Approach 1:
The sense amplifier circuit performs multiple functions using a unified structure: it acts as a signal buffer, an amplifier, a latch, and a data transfer interface all in one circuit block. This multi-functional design improves productivity without proportionally increasing complexity, as the same circuit elements serve multiple purposes in the data path.
Solution Approach 2:
The patent combines the latch circuit, signal amplification stage, and data output buffer into a single integrated sense amplifier module. This merging of functions reduces the overall circuit complexity compared to having separate discrete components for each function, while still achieving high-speed data transfer capability.
Data Source
AI summary
A compact and versatile high speed sense amplifier suitable for use in non-volatile memory circuits is presented. The sense amp circuit uses one power supply level for the bit line driving path and a second supply level for a data latch of the sense amp. The latch's supply level is of a high level that used for driving the bit lines and can be provided by a charge pump. The sense amp need use only NMOS devices for its analog path. For balancing performance and current consumption, the sense amp also includes an additional latch to support a “hybrid lockout” sensing mode, where in a verify operation a read-lockout is used between different data states, but not between the low and high quick pass write (QPW) verifies.