Sense Amplifier Offset Cancellation with Dynamic Capacitance Control
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Solution Overview
Problem
Conventional semiconductor memory apparatuses face challenges in quickly and stably canceling offsets in receiver and comparator circuits due to mismatches in processes, requiring a balance between rapid offset voltage changes and stable maintenance.
Innovation Solution
An offset cancellation circuit comprising a sense amplifier, a compensation voltage generation section, and a control loading section that adjusts capacitance and generates compensation voltages to quickly reach and maintain a target voltage level, allowing for rapid offset cancellation and stable voltage maintenance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the digital-analog converter quickly changes the levels of offset voltages in response to the code signal, then the offset cancellation speed is improved, but the stability of maintaining offset cancellation results deteriorates
Solution Approach 1:
The patent applies the Dynamics principle by making the capacitance of output nodes dynamically adjustable. During the offset cancellation phase, the capacitance is decreased to allow quick voltage changes. Once cancellation is achieved, the capacitance is increased to stabilize the voltage levels. This dynamic adjustment of electrical parameters resolves the contradiction between speed and stability.
Solution Approach 2:
The patent implements Parameter changes by modifying the capacitance value of output nodes based on the operational phase. The control section adjusts the capacitance from a first value (during cancellation) to a second value (after cancellation), enabling the system to optimize both speed and stability through parameter transformation.
2Speed
If the capacitance of output nodes is decreased to quickly change offset voltages, then the response speed is improved, but the ability to maintain stable voltage levels deteriorates
Solution Approach 1:
The patent makes the capacitance dynamic rather than fixed. The control section adjusts capacitance based on the operational state: low capacitance during voltage transitions for speed, high capacitance during maintenance phase for stability. This temporal separation of capacitance values resolves the contradiction.
Solution Approach 2:
The patent employs periodic action by alternating between two capacitance states corresponding to different operational phases. The capacitance is periodically switched between first and second values based on whether the system is in cancellation mode or maintenance mode, enabling both fast response and stable operation at different times.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables quick and stable offset cancellation, ensuring that the output signal reaches the target voltage level without offset, thereby improving sensitivity and resolution characteristics of semiconductor memory apparatuses.
Implementation Method 1
the digital-analog converter 30 generates offset voltages 'off+' and 'off−' and provides the offset voltages 'off+' and 'off−' to the sense amplifier 10
Implementation Method 2
The sense amplifier 10 receives and amplifies an input signal 'in' and generates an output signal 'out'
Implementation Method 3
adjust the capacitance of the output nodes depending upon whether a voltage level of the output signal reaches a target voltage level
Data Source
AI summary
An offset cancellation circuit includes a sense amplifier configured to receive an input signal and offset voltages and to generate an output signal. A compensation voltage generation section is configured to be inputted with the output signal, and the compensation voltage generation section increases or decreases compensation voltages until the voltage level of the output signal reaches a target voltage level. The voltage level of the compensation voltages is maintained and a control signal is enabled when the voltage level of the output signal reaches the target voltage level. A control loading section is configured to provide the compensation voltages as the offset voltages or maintains the current level of the offset voltages, according to the control signal.


