Sense Amplifier Signal Comparison With Offset Compensation
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Solution Overview
Problem
Existing signal comparison methods in integrated circuits, particularly in Non-Volatile Memory (NVM) arrays, face challenges in accurately comparing signals due to noise introduction from passgates and mismatched transistor characteristics, leading to inaccurate determination of NVM cell states.
Innovation Solution
A method and circuit design that utilizes cross-coupled latches and offset compensation capacitors to charge and discharge signals to threshold voltages, enabling increased gain and latching to produce a digital output, while minimizing noise and matching transistor branches for accurate signal comparison.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If passgates are used on the input line to enable sampling, then the sampling function is enabled, but noise is added to the input signal
Solution Approach 1:
The patent removes the passgate from the input line and replaces it with a direct connection. The sampling function is achieved through the sense amplifier's inherent sampling capability during the read operation, eliminating the need for a separate passgate component that introduces noise.
Solution Approach 2:
The patent introduces a dummy transistor configured as a resistor that matches the on-resistance of the removed passgate. This dummy transistor is placed in series with the bitline to maintain the same electrical characteristics and signal level that would have been present with the passgate, but without introducing additional noise.
2Device complexity
If transistor branches are not matched, then device complexity is reduced, but measurement precision deteriorates due to inaccurate signal comparison
Solution Approach 1:
The patent uses a dummy transistor with adjustable parameters (size, resistance) that can be tuned to match the electrical characteristics of the passgate. By changing the parameters of this dummy component, the system achieves accurate signal levels without requiring complex matching of multiple transistors in the differential pair.
Solution Approach 2:
The patent creates a copy of the passgate's electrical characteristics using a dummy transistor configured to have the same on-resistance. This copy allows the system to maintain the signal levels and timing characteristics that depend on the passgate's resistance without actually using the passgate, thereby avoiding noise while preserving functional behavior.
3Ease of operation
If sampling is enabled with passgates, then input signal control is improved, but signal integrity deteriorates due to noise introduction
Solution Approach 1:
The patent removes the passgate from the signal path to eliminate the source of noise that degrades signal integrity. The sampling control function is redistributed to other circuit elements (sense amplifier control logic, dummy transistor switching) that do not introduce the same level of noise into the sensitive input signal.
Solution Approach 2:
The dummy transistor serves as an intermediary element that maintains the electrical characteristics needed for proper signal control and timing, while being positioned or configured in a way that minimizes its impact on signal integrity. The dummy transistor's resistance matches the original passgate, ensuring proper signal levels without the noise-generating switching action of a passgate.
Data Source
AI summary
Disclosed is a method of comparing two or more signals which may include: for each of the two or more signals, charging to a fixed voltage a compensation capacitor associated with a sense path of the signal, discharging each of the charged capacitors to a threshold voltage of a transistor in its respective sense path and integrating a discharge current from each capacitor with the signal sensed on the respective sense path.