Differential Sense Amplifier Layout Without Dedicated Pass Gates

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Solution Overview

Problem

Conventional sense amplifiers in semiconductor memories, such as DRAMs, consume significant area and increase fabrication costs due to their complex structure, necessitating a more efficient and simplified design.

Innovation Solution

A differential sense amplifier is proposed, utilizing multigate transistors and a semiconductor-on-insulator substrate, with integrated precharge and equalization transistors, and eliminating dedicated switch and pass-gate transistors to reduce area consumption and enhance efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sense amplifier structure is used, then sensing function is achieved, but area consumption increases and fabrication cost increases

Engineering Contradiction:
Improvesensing functionVSAvoidarea consumption
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple transistor functions into fewer transistors. Specifically, the first and second transistors serve as both sensing elements and pass-gate transistors, eliminating the need for dedicated pass-gate transistors. The third and fourth transistors function as both precharge transistors and equalization transistors, removing the need for separate dedicated equalization transistors. This merging of functions directly reduces the number of transistors from 11 to 6, thereby reducing area consumption while maintaining the sensing function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements multi-functionality where transistors perform multiple roles. The first and second transistors universally function as sensing elements, precharge elements, and pass-gate transistors. The third and fourth transistors serve as precharge transistors, equalization transistors, and switch transistors. This universal application of transistors across multiple functions reduces the overall transistor count and area consumption while achieving all necessary sensing operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If conventional sense amplifier structure is used, then sensing function is achieved, but fabrication cost increases

Engineering Contradiction:
Improvesensing functionVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By merging multiple functions into fewer transistors (reducing from 11 to 6 transistors), the patent simplifies the fabrication process. Fewer transistors mean fewer fabrication steps, less complex interconnect structures, and reduced manufacturing complexity, directly leading to lower fabrication costs while maintaining sensing functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts and removes unnecessary dedicated pass-gate transistors and dedicated equalization transistors from the conventional sense amplifier structure. By taking out these redundant components and using existing transistors to perform their functions, the design reduces fabrication complexity and cost while preserving all essential sensing operations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If dedicated pass-gate transistors are used, then data transfer is achieved, but device complexity increases

Engineering Contradiction:
Improvedata transferVSAvoidstructure complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent makes the first and second transistors universal by enabling them to function as both sensing elements and pass-gate transistors. During the sensing operation, these transistors detect voltage differences on bit lines, and during the data transfer operation, they transfer data to global bit lines. This multi-functionality eliminates dedicated pass-gate transistors, reducing device complexity from 11 to 6 transistors while maintaining data transfer capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Reliability

If conventional sense amplifier with 11 transistors is used, then all sensing operations are achieved, but transistor count increases

Engineering Contradiction:
Improvesensing operationsVSAvoidtransistor count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges functions of multiple transistor types into fewer transistors. The first and second transistors combine sensing and pass-gate functions, while the third and fourth transistors combine precharge and equalization functions. This merging reduces the transistor count from 11 to 6 while ensuring all sensing operations (sensing, precharging, equalizing, and data transfer) are still achieved through the multi-functional transistors.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates universal transistors that can perform multiple sensing operations. The first and second transistors universally function as sensing elements, precharge elements, and pass-gate transistors. The third and fourth transistors serve as precharge transistors, equalization transistors, and switch transistors. This universality reduces the total transistor count from 11 to 6 while maintaining all necessary sensing operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2518729B1Differential sense amplifier without dedicated pass-gate transistors
Publication Date: 2013.11.13 SOITEC SA
  • EP2518729B1 patent drawingFigure 1
  • EP2518729B1 patent drawingFigure 2a
  • EP2518729B1 patent drawingFigure 2b

AI summary

A differential sense amplifier for sensing data stored in a plurality of memory cells (C) of a memory cell array, including: - a first CMOS inverter having an output connected to a first bit line (BL) and an input connected to a second bit line (/BL) complementary to the first bit line, - a second CMOS inverter having an output connected to the second bit line (/BL) and an input connected to the first bit line (BL), each CMOS inverter comprising a pull-up transistor (M21, M22) and a pull-down transistor (M31, M32), said sense amplifier having a pair of pass-gate transistors arranged to connect said first and second bit lines (BL, /BL) to a first and a second global bit lines (IO, /IO), wherein the pass-gate transistors are constituted by the pull-up transistors (M21, M22) or the pull-up transistors (M31, M32).