Sense Amplifier RC Imbalance Compensation via Asymmetric Capacitance
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Solution Overview
Problem
The connection of sense amplifiers to bit lines and complementary bit lines in semiconductor memory devices can be unbalanced, leading to errors in operation.
Innovation Solution
A sense amplifier configuration with specific transistor connections and a resistance-capacitance (RC) imbalance compensation method, where a first RC value is smaller than a second RC value, and a program voltage is applied to a charge trap transistor during a specific time period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the sense amplifier is connected to the bit line and complementary bit line with equal RC values, then the connection is balanced, but manufacturing precision and processing dispersion make this difficult to achieve
Solution Approach 1:
The patent intentionally introduces asymmetry by adding different capacitance values to the bit line side and complementary bit line side. Specifically, a first capacitance is added to the bit line and a second capacitance (different from the first) is added to the complementary bit line, creating an asymmetric RC configuration that compensates for inherent manufacturing imbalances and achieves overall connection balance.
Solution Approach 2:
The patent modifies the RC parameters by adding external capacitances to adjust the time constants. By changing the capacitance values (first capacitance and second capacitance) independently on each side, the system can compensate for processing dispersion and achieve balanced RC values despite manufacturing variations.
2Device complexity
If the sense amplifier uses a simple connection to bit lines, then the device complexity is low, but connection imbalances cause operation errors
Solution Approach 1:
The patent introduces intermediary capacitance elements (first capacitance and second capacitance) that mediate between the sense amplifier and the bit lines. These capacitances act as buffer components that compensate for connection imbalances, improving operational reliability without requiring complex reconfiguration of the basic sense amplifier structure.
3Measurement precision
If the sense amplifier is designed with balanced RC values, then operation accuracy is high, but processing dispersion makes this difficult to achieve
Solution Approach 1:
The patent applies preliminary compensation by pre-calculating and pre-setting the first capacitance and second capacitance values to counteract expected processing dispersion. This preliminary action ensures that even before actual operation, the RC values are pre-adjusted to achieve balanced time constants, thereby ensuring high sensing accuracy despite manufacturing variations.
Solution Approach 2:
The patent independently adjusts the capacitance parameters (first capacitance and second capacitance) to compensate for processing dispersion. By changing these parameters, the system achieves the desired balanced RC values and high sensing accuracy without requiring extremely precise manufacturing control.
Data Source
AI summary
A sense amplifier connected to a bit line and a complementary bit line, the sense amplifier including a first transistor connected between the bit line and a first node and including a first gate terminal connected to a third node, a second transistor connected between the first node and the complementary bit line and including a second gate terminal connected to a fourth node, third transistor connected between the bit line and a second node and including a third gate terminal connected to the third node, and a fourth transistor connected between the complementary bit line and the second node and including a fourth gate terminal connected to the fourth node, wherein first and second RC values viewed from the sense amplifier toward the bit line and the complementary bit line differ, and wherein the second transistor is configured to receive a program voltage during a first time period.