Sense Amplifier Voltage Equalizing Circuit for Signal Speed

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Solution Overview

Problem

A potential difference between nodes of a sense amplifier connected to bit lines in a charge cancelling stage can reduce the signal amplification speed.

Innovation Solution

Incorporating a voltage equalizing circuit between the nodes of the sense amplifier, which connects the nodes in a charge sharing stage to equalize their voltages, thereby improving signal amplification speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a charge cancelling stage is implemented to cancel charge in bit lines, then charge cancellation is achieved, but a potential difference occurs between nodes which reduces signal amplification speed

Engineering Contradiction:
Improvecharge cancellationVSAvoidsignal amplification speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The voltage equalizing circuit performs preliminary action by equalizing the voltages at the first node and second node before the signal amplification stage begins. This preliminary voltage equalization prevents the potential difference from reducing signal amplification speed, while still allowing the charge cancelling stage to function properly for charge cancellation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The voltage equalizing circuit acts as an intermediary component between the charge cancelling stage and the signal amplification stage. It mediates the voltage difference created during charge cancellation by providing a path to equalize potentials, thereby enabling both charge cancellation and fast signal amplification without direct conflict.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If voltage equalization is performed between nodes, then signal amplification speed is improved, but additional circuit components are required

Engineering Contradiction:
Improvesignal amplification speedVSAvoidcircuit components
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The voltage equalizing circuit is merged with the existing sense amplifier structure, sharing common components such as the first and second nodes that are already part of the amplification circuit. This merging approach provides voltage equalization functionality while minimizing additional circuit components and complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The voltage equalizing circuit effectively reduces voltage differences between nodes, enhancing the signal amplification speed of the sense amplifier.

Implementation Method 1

the voltage equalizing circuit is connected between the first node and the second node, and is configured to connect the first node and the second node in a charge sharing stage

Methodology Applied
Scientific EffectCharge sharing: Capacitance

Data Source

PatentUS12205628B2Sense amplifier, method for driving sense amplifier, and memory
Publication Date: 2025.01.21 CHANGXIN MEMORY TECH INC
  • US12205628B2 patent drawing
  • US12205628B2 patent drawing
  • US12205628B2 patent drawing

AI summary

A sense amplifier includes an amplifying circuit and a voltage equalizing circuit. The amplifying circuit includes: a first P-type transistor, having a first terminal connected to a third node, a second terminal connected to a first node, and a gate connected to a first bit line; a second P-type transistor, having a first terminal connected to the third node, a second terminal connected to a second node, and a gate connected to a second bit line; a first N-type transistor, having a first terminal connected to the first node, a second terminal connected to a fourth node, and a gate connected to the first bit line; a second N-type transistor, having a first terminal connected to the second node, a second terminal connected to the fourth node, a gate connected to the second bit line. The voltage equalizing circuit is connected between the first node and the second node.